SU714399A1 - Arrangement for detecting and correcting errors in residual class system - Google Patents

Description

(54) DEVICE FOR DETECTION AND CORRECTION OF ERRORS IN THE SYSTEM OF RESIDUAL CLASSES

one

The invention relates to the field of automation and computer technology, in particular, can be used both to control and correct an error during the transmission of information, as well as during arithmetic operations in a computer,

A device for detecting and correcting errors is known, which contains a register, adder and a memory block and is based on the nulliating process 1. The zeroing process consists of sequential subtraction from the number representation in the system of residual classes of system constants to determine if there is no error. I The closest in technical essence to the claimed device is a device for detecting and correcting errors in the system of residual classes, which contains a register whose input is the same as the device's drive, three adders and a memory block whose inputs are connected to the outputs of the first and second adders 2,

The disadvantages of the known devices. is the difficulty that is determined by the fact that

the magnitude of the error is made on the basis of the expansion of the original base system, which is associated with the determination of the magnitude of the inaccurate rank.

The object of the present invention is to simplify the device. This goal is achieved by the fact that the device contains two modular convolution units, with the first output

The 0 register is connected to the input of the first and second modular convolution units, and with the first input of the third accumulator, the outputs of the first and second modular convergence blocks.

5, respectively, with the first inputs of the first and second adders, the second and third outputs are register-connected, respectively, with the second inputs of the first and second cyMh aTOpoB and with

0 by the second and third inputs of the third adder, the output of the memory unit is connected to the fourth input of the third hummer, the output of which is the output of the device.

five

The drawing shows the functional scheme of the device for detecting and correcting errors in the system of residual classes.

The device consists of a register 0 1, intended for storing os714399

tatkrv numbers on the working and counter bases during the time of error detection, the input of which is connected to the input 2 of the device; the first 3 and second 4 modular convolution blocks for calculating the residual numbers on the test bases, the inputs that are connected to the first output of register 1; the first adder 5 and the second adder b, designed to calculate the syndromo error in the first 1y and. the second control SCHEYOV, the first inputs of which are connected to the outputs of the first 3 and second 4 modular convolution units, respectively, and the second inputs - respectively to the second and. third-register output 1; a memory unit 7 for storing the constant, the inputs of which are connected to the outputs of the first adder 5. and the second adder 6; the third cyMvia torus 8, designed to get the corrected number by summing, incorrect (with error) number and error constant, the first, second and third inputs of which are connected respectively to the outputs of register 1, and the fourth input is connected to the output of the memory block 7, The output of the third adder 8 is the output 9 of the device.

The operation of the device for detecting and correcting the system in the system of residual tanks is carried out in the following manner.

The input 2 of the device for detecting and correcting errors in the number system of residual classes is controlled by the number A s (- f .d.2 ..., ot f.. OCh.ri .. f - the remainder of the number A no to the module P., a P ,,, Pgf ... P, -...., P 2. The base of the number system, which is written in register 1. On: the inputs of the first 3 and second 4 modular convolution blocks from the first output of register 1, add the number A L ., CX. 2 / ",. f rt /% n with no residuals ot. and test bases with the formation at their outputs of signals corresponding to orders:

, 0V

 iti

 .

..- 4- f4 --- T -a V moaP 2,

where L. is the system constants of computation.

- Ostatox141 controlled cell number A on the control base Pf ,. from the second output of register 1 and the value C-vi from the output of the first block 3 of the modular convolution is fed to the inputs of the first adder 5 with the formation at the output of the error syndrome, equal to

, +,. 1 Balance cCj 2 controlled number

And according to the control.

h + 2 of the third output of register 1 and the value from the output of the second block 4 of the modular convolution are fed to the inputs of the second adder 6 with the formation at its output of an error syndrome equal to.

.

Values dlijCfsnocTj nawT To the inputs of the memory block 7, and from there choose the co. the corresponding error constant. This error constant enters the third adder 8, where it is added to the wrong number A from register 1.

The error constant is chosen in such a way that when it is added to a controlled number A, the error in the number is eliminated.

The corrected number from the output of the third adder 8 is fed to the output 9 of the device.

As an example, consider them the number system of residual classes with bases,, as the control bases RP-1. and choose the values of P - 5, P - 7.

Relationships describing the operation of the first 3 and. second 4 modular convolution blocks, take the form:

.2lno (35

OS

- Memory block 7 will contain 1 arcing error constants. .

Let ya input 2 of the device be supplied with a controlled number A (7.4; 4.5)

From the outputs of the first 3 and second 4. modular convolution blocks in this case, we get: cC, to 4., 7 + 4 n 2 d.4 22.7 + 5.4 6mod7

The magnitudes of the syndromes svybki C and (Tj will be ravya

сГ 4 - 2 2 ntod 5

  YY1037

From memory block 7, in accordance with 6, d, 2, and 2.6, an error value (3.0) is selected, which is added to the controlled number in the third adder 8 to form an output.

(7.4) + (3.0) (10.4)

Note that if the number does not contain an error, then the value of the constraint dl | and cf2 are zero.

Using the proposed invention, the first and second modular convolution blocks simplify the device, abandoning two structurally complex blocks for expansion, and thereby increase the speed of the device .:

Claims (2)

1. USSR Author's Certificate, No. 226278, cl. G66 F 11/08, 1965, 2. USSR author's certificate. No. 398956 cells, G06 F 11/00, 1971 (prototype). 0