SU606205A1 - Analogue-digital converter - Google Patents

Description

(54) ANALOG-DIGITAL CONVERTER

The invention relates to computing, 1 designed to convert an analog waveform to discrete, can be used in control systems. Analog-to-digital converters (ADCs), covered by negative feedback, are known. The most perfect of them are those whose feedback is not opened during the conversion process. ADCs of this type are common, and the conversion circuit from analog to discrete form is realized by the method of subtracting and multiplying the remainder 1. The disadvantage of such devices is the large hardware costs. Closest to the proposed analog-to-digital converter containing a buffer amplifier, amplifier, scaling with additional operating systems and keys, connected in series with a buffer amplifier, an internal analog-to-digital converter connected to the output of the scaling amplifier, as well as to the control unit, registers connected consistently with each other and connected via two-input elements to coincidence to the corresponding bit inputs of the internal converter, the sign definition device, connected to the outputs of the neighboring registers and connected to the registers with their outputs, an addition block connected to the outputs of registers and a sign definition block, a control block connected to the registers, second inputs of two-input matching elements, keys, a digital-analog converter connected to registers and connected via keys to a power point of a scaling amplifier 2. The disadvantage of such a device is the use of additional feedback to change the gain of the amplifier, This complicates the circuit. The purpose of the invention is to simplify the device. The goal is achieved by the fact that in an analog-to-digital converter containing an amplifier, the non-inverting input of which is connected to the output of a voltage source, the inverting input is connected to the input of a digital-to-analog converter, and the output is directly to the inputs of a digital-analog converter and through the internal a11a.log-digital converter - with the first inputs of the three groups of elements And, the second inputs of which are connected

respectively, to the outputs of the control unit and to the first control inputs of the respective registers, the outputs of each of the groups of elements I are connected to the inputs of the corresponding registers, the second control input of the first register is connected to the control output of the second register, the second control input of which is connected to the control output the third register, the sign output of the first register is connected to the nerve input of the first sign definition unit, the second input of which is connected to the sign output of the second register and to the first input to The first sign definition block, and the output to the third control inputs of the first and second registers, the sign output of the third register is connected to the second input of the second sign definition block, the output of which is connected to the Second control input of the third register and to the third control input to the second register , the outputs of the first and second registers are connected to the first inputs of the respective groups of two-position keys and to the inputs of the addition block, to the other inputs of which are also connected the outputs of the third register controlling the input DIP keys are connected to respective outputs of control unit keys and outputs connected to respective inputs of digital-to-analog converter, the output of the amplifier is coupled to second inputs of the keys.

The structural electrical circuit of the device is shown in the drawing.

The device contains an internal analog-to-digital converter 1, registers 2-4, control unit 5, analog converter 6, amplifier 7, elements 8-10, sign definition blocks 11 12, on / off keys 13, AND, addition block 15.

The device works as follows. In the initial state, the keys 13, 14 are in the position at which their outputs 16, 17 are connected to the corresponding inputs 18, 19. The signals from the output 20 of the amplifier 7 are received simultaneously to all the inputs of the R-2R grid of the pre-processor 6. mesh. With p 12 selected, it

Y 11

equals -jir: rr. The voltage at output 20 of the amplifier is set equal to the voltage of the signal source 21 with an error. The output voltage of the amplifier is encoded by an internal converter L The converter has four numeric bits and one sign and outputs the result of five and eight buses, respectively. The signal gp output 22 of block 5 allows the passage of information: through elements AND 8 to register 2. The numerical result entered in the register is present at its outputs 23 and the sign output 24. From the outputs 23, the result goes to the inputs 25 of the keys 13, which are controlled impulses from output 26 of block 5. Another impulse switches keys 13 to another position. The result is transferred to the inputs of AND) of the converter 6.

With the arrival of a discrete signal, the R-2R grid is under simultaneous operation of the discrete and analog signals. The discrete signal — the numerical result is converted by the grid into analog form and is applied to the input 27 of amplifier 7; compensating voltage source of 21 signals. The difference of these voltages does not exceed the unit of the lower order of converter 1. An analog signal is fed to the grid inputs 17, 16 and, in accordance with the new grid transmission coefficient, is fed to input 27, reducing the difference between the voltage of input 27 and the voltage of signal source 21 to values less than one of the youngest bit of the converter 6. The change in the transmission coefficient is caused by the disconnection of the analog signal from the inputs b.

The new transfer coefficient is - exceeds the previous ratio

transfer 2 times. Since the voltage difference between the source of the 21 signals and the analog equivalent of the numerical result does not exceed the unit of the youngest bit of the converter 1, i.e. - gl - all the buttons, then the amplified one in accordance with the new transmission coefficient of the grid of the eye does not exceed the dynamic range of the transform. 1k can be directly encoded. The amplified difference is present at the output 20 of the amplifier 7 and is fed directly to the converter 1. The result of the new conversion is present at the outputs 28. The signal from the control unit 5 allows the information to pass through AND 9 elements to the register 3. The numerical result entered in the register 3 is present at its outputs 29 and the sign output 30. Information about the sign goes to block P and informs whether the sign is positive or negative, as well as about its absence. Absence takes place if all bits of a numerical result contain zero.

If the signs of the results present in registers 2 and 3 are the same, the information received at the input 31 of register 3 does not change the sign of the number and the number itself present in this register. If the characters differ, the information at input 31 changes the sign of the number, and the number itself is subtracted from the unit of the youngest bit of the number present in register 2. The number present in the register 2 is reduced accordingly by the unit of the youngest bit. If the bits of registers 2, 3 contain only zero, the information on outputs 24, 30 does not lead to the formation of the sign "- or" in the registers. If a significant number is present in one of the registers, the register containing one zeros in the bits takes the character of the other register.

Claims (2)

On a signal from output 32 of block 5, keys 4 are switched to another position. The result is transferred to the inputs 17 of the converter 6. The discrete signal — the numerical result is converted by the grid R-.2R to an analog equivalent. The resulting analog signal compensates for the voltage difference obtained after the previous conversion. The compensation error does not exceed the low-order unit of converter i. The Akalogovy} signal now arrives only at the inputs 33 of the R-2R grid and, in accordance with the new grid transfer ratio, is input 27 of amplifier 7, reducing the difference between the voltage at this input and the voltage of the signal source to values less than 1 the lowest bit of the converter 6 The change in the transmission coefficient is caused by the disconnection of the analog signal from one 17. The new transmission coefficient rm is 2 times higher than the previous one. Since the compensation error does not exceed the unit of the younger bit of converter 1, i.e. the entire scale, then, is amplified in accordance with the new grid gain, it does not exceed the dynamic range of the converter and can be directly encoded. The amplified error is present at the output 20 of the amplifier 7 and is fed directly to the converter. The result of the new conversion is present at its outputs 34. The signal from the output 35 of the control unit 5 permits the passage of information through the AND elements to the register 4. The numerical result recorded in the register is present at its outputs 36 and the sign output 37. As in the case of registers 2, 3, information about the signs of the registers 3, 4 enters the sign determining unit 12 and corrects the signs and contents of the registers 3, 4. The numerical results from the outputs 24, 23, 29, 36 of the registers 2, 3, 4 enter the inputs 38 of the block 15 , form its outputs 39 numerical word - result m converting voltage source 21 signal in discrete form. In the word 12 bits and the sign bit, the conversion error is no more than on the whole scale. Before the next conversion, the registers according to the signal from the outputs 22, 40, 35 of the block 5 are brought to the initial state. The register bits in this case contain only zero. Analog-to-digital converter containing an amplifier whose non-inverting input is connected to the output of a source of convertible voltage, the inverting input to the output of a digital-to-analog converter, and the output directly to the inputs of a digital-to-digital converter and through an internal analog-to-digital converter with the first inputs of the three groups of elements And, the second inputs of which are connected respectively to the outputs of the control unit and to the first controlling inputs of the respective registers, you Each of the AND groups of cells is connected to the inputs of the respective registers, the second control input of the first register is connected to the control output of the second register, the second control input which is connected to the control register of the third register, the sign output of the first register is connected to the first input of the first a block for determining the mark, the second input of which is connected to the sign of the second register and to the first input of the second block of the definition z.chak, and the output to the third control inputs of the first and second registers, knowing The third output of the third register is connected to the inputs of the second block for determining the sign, the output of which is connected to the second control input of the third register to the third control. the input of the second register, the outputs of the first n of the second registers are connected to the first inputs of the corresponding duplicate key groups and the inputs of the addition unit, the other inputs of which are also connected to the third register outputs, the control inputs of the keys are connected to the corresponding outputs of the control unit, and the outputs of the keys are connected to the corresponding inputs a digital-to-analog converter, different in that; that, in order to simplify the circuit, the output of the amplifier is connected to the second inputs of the key. Sources of information taken into account in the examination: 1. US Patent No. 3501625, cl. 340-347, 7.03.70. 2. US patent No. 3483550, cl. 340-347, 9.12.69.