SU531246A1 - Frequency synthesizer - Google Patents

Description

one

The invention relates to radio engineering, can be used in receiving-transmitting devices.

A frequency synthesizer is known, comprising a tunable oscillator, a frequency divider, a phase detector, an adder and a filtering device, and a supporting oscillator, the output of which is connected to the second inputs of the phase detector, the filtering device and the clock input of the fractional parts accumulator, the control inputs of which connected to the corresponding outputs of the master device, and the fractional outputs of the accumulator of fractional parts are connected to the corresponding inputs of the digital-analog converter, the output of which is connected nen to the second input of the adder.

The purpose of the invention is to increase the speed during frequency tuning - in the proposed synthesizer, between the output of the reference oscillator and one of the control inputs of the frequency divider there are connected in series And and the trigger, the second inputs

which are connected to one of the outputs of the fractional parts accumulator, while the remaining control inputs of the frequency divider are connected to the corresponding outputs of the driver.

The drawing shows a structural electrical circuit of a frequency synthesizer.

The frequency synthesizer contains ringed tunable generator 1, frequency divider 2, phase detector 3, adder 4 and filtering device 5, as well as supporting generator 6, the output of which is connected to the second outputs of phase detector 3, filtering device, 5 and to the clock input fractional parts accumulator 7, the control inputs of which are connected to the corresponding: outputs of the master device 8, and the bit inputs to the corresponding inputs of the digital analogue converter 9. The output of the converter 9 is connected to the second; the input of the adder 4, and between the output of the reference generator 6 and one of the control inputs of frequency divider 2 are connected in series And 10 and trigger 11, the second inputs of which are connected to one of the outputs of the fractional parts accumulator 7, while the remaining control inputs of the frequency divider 2 are connected to the corresponding outputs of the driver 8,

The frequency synthesizer works as follows.

The first input of the detector 3 through the divider 2 receives a signal from the generator 1. At the same time, the second input of the detector receives a signal from the reference generator b. At the output of the detector, a pulse voltage is formed, the constant component of which varies during the operation of the synthesizer from clock to clock. The signal from the detector passes through the adder 4 to the filtering device 5, which generates a control voltage proportional to the integral of the constant component of the input signal. The voltage of the device 5 controls the generator 1.

When an integer is fed from the master device 8 to the synthesizer, the zero input voltage is supplied to the second input of the adder 4 from the converter 9. At the same time, in the established mode, the duty cycle of rectangular pulses at the output of phase detector 3 is equal to two. When the fractional part of a number other than zero enters the drive 7, the drive, with the arrival of each clock pulse of the generator 6, stores these fractional parts. As a result, a progressively increasing number is formed at the output of the accumulator. In converter 9, it is transformed into a step voltage, which is added in adder 4 with a constant component voltage of

3 and acts through the filtering device 5 on generator 1. As a result, there are asynchronous signals at the inputs of phase detector 3, and at its output is a pulse signal with a variable duty cycle, the constant component of which varies from one beat to another according to a stepwise law. Failures are resolved by trigger 11 and AND 10.

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Claims (1)

Invention Formula A frequency synthesizer that contains a tunable oscillator connected in a ring, a frequency divider, a phase detector, an adder and a filtering device, and a main oscillator, the output of which is connected to the second inputs of the phase detector of the filtering device and to the clock 0 to the input of the fractional parts accumulator, the control inputs of which are connected to the corresponding outputs of the setting device, and the fractional parts of the accumulator parts accumulator are connected -. To the corresponding converter inputs a digital analogue, the output of which is connected to the second input of the adder, characterized in that, in order to increase speed, between the output of the reference oscillator and one of the control inputs of the frequency divider are connected the series connectors And and the trigger, the second inputs of which are connected to one of the outputs of the fractional parts accumulator, while the remaining control inputs of the frequency divider are connected to the corresponding outputs of the driver.