SU495785A1 - Ring distributor - Google Patents

Description

one

The invention relates to the field of computational technology and can be used for distributed signals, the duration of which is equal to the period of the following clock signals, for m output signals.

The well-known ring distributor, the cell of each bit of which contains an “AND-OR-IE” element with three AND elements and an “NOT” element whose output is connected to one input of the third “AND-AND-NOT-element element, is structurally complex.

To reinforce the device in it, the output of the AND-OR-NOT element of each digit is connected to the input of the third element AND of the AND-OR-NOT element of the previous digit and to one input of the first element AND of the AND-OR-NO element cells of the subsequent discharge, output of the element “NOT cells of each discharge of the plug to another input of the first element“ AND of the element “PI-OR-NOT cells of the subsequent discharge and to one input of the second element“ AND of the element “AND-OR-NO cells of the same bit, and the clocking clock signal is connected to another input of the second element “And and the third input of the first element "and an element" AND-OR-NO element of each discharge cell.

The scheme of the proposed device is shown in the drawing.

2

The device contains the elements 1, 2, 3, 4. which are the elements AND-OR-IE, and the elements 5, 6, 7. 8, is a inverter, respectively, of the first, second, third and fourth bits.

The device works in the following way.

At the initial moment, the time trigger of the nerve discharge is set to the “single” state, the thringers of the remaining bits are set to the “zero” state. In this case, at the outputs of elements 1, 6, 7, 8 is a logical zero, and at the outputs of elements 5, 2. 3, 4 - a logical one. With the arrival of a clock signal m, equal to logical unity, at the output of element 2, oo is a signal equal to logical zero, therefore, on element 6, oo is a signal equal to logical logic. The signal, to a logical zero, from the output of element 2 notsuits to the input of element 7, however, at the output of element 1, the value of the signal will not change. After the end of the action, the tactic) AND, his sigial at the output of element 1 but is the logical unit, and at the output of element 5 is the logical zero. Thus, the trigger of the second bit is set to the state of "one", and the trigger of the first bit is set to the state of "zero. With the arrival of the next, its clocking signal m, the third-bit trigger is set to the state of “one, io.t. the end of the clock signal’s action, the second-bit trigger is set to the state“ zero. Similarly, there is a shift of the unit from the third bit to the fourth, from the fourth to the not trenches, and so on.

Ф о рм ул а of о b 1) о Т е и и and

Ring distributor, the cell of each bit of which contains the element “AND-OR - NOT with three elements“ AND and the element “NOT, the output of which is connected to one input of the third element“ PI of the element “AND-OR --- NOT. different in that. what. in order to simplify the device, the output

of the element “AND - OR — NO cells each1 () of the discharge is connected to the second input of the third element“ AND AND “AND-OR-NOT cells of the previous1, its discharge and to one input of the first element“ AND element “AND-OR- - NOT the cells of the subsequent discharge, the output of the element “NOT the cells of each discharge is connected to another input of the nerve element“ AND edeite “AND-OR-HIi cells of the subsequent discharge and to one input of the second element“ AND of the element “Ii - OR-NOT cells of the same bit, and the clock signal is connected to another input of the second element “AND and to the third input of the first "Element" And-or-NOT cells of each bit.