SU463234A1 - Device for dividing cycle time into fractional number of intervals - Google Patents

Description

The invention relates to computing technology and a data transmission system, can be used in electronic digital computers, electronic alarm devices, in particular, for cycle distributors dividing the cycle by a fractional number of intervals with a multiplicity of 0.5. Devices are known for dividing the cycle time into a fractional number of intervals with a multiplicity of 0.5, containing a shift register, cycle trigger, the inputs of which are connected to the outputs of the starter and the source of the input frequency. In the known circuit, the input of the cyclic trigger is not controlled, which entails a large number of logic elements of the circuit, and consequently, greater power consumption and dimensions. The purpose of the invention is to increase efficiency and reduce power consumption - achieved by introducing a control trigger into the circuit, the input of which is connected to the output of the cell of the corresponding shift register bit, outputs of the trigger trigger and cycle trigger connected to the inputs of two additionally introduced And schemes, and the outputs of the circuits "And connected to the input of the shift register. FIG. 1 shows a block diagram of the device; in fig. 2 - time diagram of his work. The device for dividing the cycle time into a fractional number of intervals with a multiplicity of 0.5 contains control trigger 1, schemes "AND 2, cyclic trigger 3, shift register 4, trigger 5, input frequency source 6. Outputs a and b of control trigger 1 connected to the inputs a and b of the circuits "And 2, the outputs of which are combined. The second inputs of the circuits "And connected to the output; a and b cyclic trigger 3. The total output of the circuits "1b is connected to the counting inputs of the triggers of the shift register 4. To obtain a given division of the cycle into m + 0.5 intervals, where m is any integer, the shift register should consist of m + trigger . The control inputs of the cyclic trigger 3 are connected to the starting device 5, and the counting input is connected to the input frequency source 6. The counting bit of the trigger 1 can be connected to the output of any shift register trigger. FIG. 1 shows the connection, for example, with the trigger t. The device works as follows. When starting the circuit from the starter 5, the cnc trigger 3 receives a counting signal, and with the first chmuls from the input frequency source 6, the inputs of the And 2 circuits receive a pulse from the trigger 3. At the second input of one of the I and Zvpluspusp control trigger 1 (for example, 3a), a control potential arrives, which, when coincident with trigger's Nmuyles 3, outputs through the circuit 3 a resolution potential to the counting inputs of all the triggers of the shift register of unit 4.

Thus, a potential appears at the output 4a of the shift register of unit 4. With the arrival on the trigger 3 of the second impulse of the input frequency, it has a different position. In this case, from the circuits “And 2 pa the counting inputs of the triggers of the shift register 4, the supply of the discharging potential is opened.

With the arrival of the third pulse of the input frequency at the counting inputs of the triggers of the shift register 4, the resolution difference appears again, and from the output 4 of the trigger of the shift register 4, the potential is removed, the duration of which is thus equal to two periods of the input frequency. At the time of the disappearance of the output at the output of the trunger 1, the output appears on the output of the trigger 4 b of the shift register of units 4.

The duration of this potential in the further operation of the distributor is also equal to two perpodam input frequency, etc.

With the arrival of a 2 m-1-m imiuls of the input frequency at the output of the flip-flop, similarly to that described above, a potential appears, which is equal to two periods of the input frequency, i.e., is determined by the 2 / n + 1-th pulse.

With the arrival of this impulse, the output of the m-th trigger of the shift register unit 4 to the trigger 1 is switched on and then

Permit resolving from the counting inputs of the triggers of the shift register 4. In the future, the resolution and the potential is given by the circuit 3 b, which works on a combination of even pulses of 2 tons, 2 mf 2, etc., of the input frequency with the trigger potential of trigger 1. The operation from circuit 3 b continues during a full cycle acquisition, i.e., prior to irihod to trigger 1, it follows its impulse from the t-trigger. Thus, dlptel1) The position of the Ioteitspala at the output of the 7d - 1-in () th trigger is equal, in contrast to the previous time series, to one period of the input frequency, i.e. the time between impulses 2 t and 2 times the pulse t + 2.

As a result, the duration of the q; 1kla is divided into / n + 0.5 intervals.

PRIOR DIRECTORSHIP and

A device for dividing the cycle time into a fractional number of intervals with a multiplicity of 0.5, containing a shift register, cycle trigger, the outputs of which are connected to the outputs of the trigger and the input frequency source, characterized in that, in order to increase efficiency and reduce power consumption, A control trppgg is inputted, the input of which is connected to the output of the cell of the corresponding shift register register, and the outputs of the control trigger and cycle trigger are connected to the inputs of two additionally introduced "Ii" circuits, and the outputs of the "And connected to the shift register inputs.

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