SU467343A1 - Code converter - Google Patents

Description

The invention relates to the field of computer technology and is intended to convert binary-coded numbers from a positional number system with any base to a binary number system.

Converters of codes are known that contain / 5-ary registers of coefficients a, (t 0, 1, 2, ..., p) a binary register, the input of which is connected to the output of the low-order p-ary register of the coefficient a, and the control circuit, the first the output of which is connected to the shift circuits of the / -ich and binary registers. The known devices contain complex correction circuits and require large hardware costs.

The purpose of the present invention is to simplify the device when converting binary-coded numbers from a positional number system with any base to a binary number system.

The goal is achieved by the fact that the device contains a base register, the outputs of which are connected to the inputs of / 7-case registers of all coefficients; except for the coefficient ip, the second output of the control circuit is connected to the output circuits of the base register code, the outputs of the lower bits of each p-ary coefficient register иг are connected to the receiving chains of the p-th coefficient register of the coefficient.

The circuit converter codes shown in the drawing.

The device contains p-ary registers 1 of coefficients GJ (i О, 1, 2,..., / G), binary register 2, control circuit 3 and base register 4. Register 1 of coefficient ip and base register 4 have t binary bits Dov. The value of m is chosen from the relation rn logzp, where p is the base of the number system.

Binary register 2 has (pt-1) bits, / 5-ary registers 1 of coefficients a, have the property of an adder and have () binary bits, and register 1 of the On-i coefficient also contains an additional overflow bit.

The device works as follows.

Let it be necessary to convert a binary-coded number

N a „-р + + ... a, -р + а, -р.

from positional number system with base p to binary number system. In the initial state, the binary code of base p is written in the base register 4, the codes of the coefficients Cr are written in the m leading bits of the p-ary registers 1, and the binary register 2 is set to the zero state. Each conversion cycle consists of two cycles.

In the first cycle, the control circuit 3 issues

the control signal on the circuit for issuing the code of the base register 4. In this case, the base code is fed to the inputs of the p-ary registers 1 of the coefficients ui with a shift by one binary bit.

The low bits / 7-bit registers of the 1g coefficient i control the reception of the code of the base into the p-ary registers of the 1 coefficients Cr-i the contents of these registers with the base code. In the second cycle, according to the signal of the control circuit 3, arriving at the shift chain of the reg-registers 1 of the coefficients иг and of the binary register 2, the right shift is made (by one bit) of the contents of the indicated registers. When shifting, the next digit of the conversion result from the low-order bit of the p-ary register 1 of the coefficient Oo is rewritten to the high bit of the binary register 2, and in the p-ary-1 registers of the coefficients a, the lower digits of the shift are lost. This completes one conversion cycle.

To complete the conversion, it is necessary to perform (pt - {- p-I) cycles, after which the higher bits of the binary code will be in (from + 1) lower bits of the p-ary register 1 of the coefficient ao, and the lower bits of the binary code - in binary register 2. The first n conversion cycles are idle, since the lower digit of the binary

the result code is transferred to binary register 2 only in the () -M cycle.

If we enter into the device η registers of 4 bases pi (i 1, 2, ..., p), and the outputs of registers of 4 bases are connected to the inputs of p-ary registers of 1 coefficients, then it is possible to convert the number from a heterogeneous positional number system to a binary reckoning

The conversion process in this case is done in a similar way.

Subject invention

A code converter containing, p-ary registers of coefficients a (1, 2, ..., p), a binary register, the input of which is connected to the low-order output of the p-ary register of the coefficient ao, and a control circuit whose first output is connected to shift chains of p-ary and binary registers, characterized in that, in order to simplify the device when converting binary-coded numbers from a positional number system with any base to a binary number system, the device contains a base register, the outputs of which are connected to the p inputs ich The registers of all coefficients a ,, except for the coefficient a, the second output of the control circuit is connected to the output circuits of the base register code, the low-order outputs of each p-ary register of the coefficient ui are connected to the reception circuits of the p-ary register of the coefficient.