SU451203A2 - Push pull binary counter - Google Patents

Description

one

The invention relates to a pulse technique.

Known binary counter on the main author. St. No. 224927.

The purpose of the invention is to simplify the device.

For this purpose, the inverse output of the auxiliary trigger, the inverse output of the first main trigger and the direct output of the second main trigger are connected to the inputs of the coincidence circuit of the first axial trigger of the next pair of bits.

FIG. 1 shows a functional diagram of two counters of the counter; in fig. 2 conditional value of the counter pair bits; in FIG. 3, the connections of the paired pairs of the jpifAOB counter among themselves.

The device works as follows. Before the start of the pulse counting reset in O the main triggers 1y and 1y and

auxiliary 1x are set to

O. state. The counter starts counting with the arrival of a push-pull series of control pulses — the main P and auxiliary (

tl is countable

Ny Yl P

impulses, and produced from the calculating

pulses by shifting them over time

Not with my help. Thus, for each main counting pulse, one auxiliary counting pulse of the same duration comes, shifted by the magnitude of the duration of the counting pulse.

1 The states of the triggers for each i1111 pulses: are given in the table, where the states of two triggers are indicated, according to which diode logic circuits 2–4 produce a pulse that changes the state of the third trigger.

Number of counting pulses

Trigger Initial State

1р 1ь 2р 2в Зр Зь 4р The table shows that the states of the main triggers at the end of the auxiliary pulse correspond to the binary representation of the counting pulses, that the auxiliary trigger 1x changes the state of the two main triggers of the main triggers. For each pulse, one coincidence circuit (2h-4) is triggered, controlling the installation of the corresponding trigger in the state O or, thus ensuring high reliability. FIG. The 3 pairs of bits are interconnected as follows: the outputs of the P. of the main flip-flops and the X of the auxiliary next pair of bits are connected to the coincidence circuit 4 (inputs H, P, B in Fig. 1) designed to control the first main trigger of the next pairs of bits

4i The preceding pair of bits produces X levels, different outputs tH- 1 T1, resolving the next couple of times, the counter's rows when the trigger state is in and IXj in O (see; 1 in O, 1 of TAS). These triggers accept these states by the fourth main pulse, in which the unit is transferred to the next pair of counter bits. The subject of the invention. A push-pull double counter according to aut. St. No. 224927, distinguished by the fact that, in order to simplify the device, the inverse output of the auxiliary trigger, the inverse output of the first main trigger and the direct output of the second main trigger are connected to the inputs of the matching circuit of the first main trigger. blowing pair of bits

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