SU400892A1 - DEVICE OF COMMUNICATION OF DIGITAL COMPUTER MACHINE WITH TWO-POSITION PULSE SENSORS - Google Patents

Description

one

The invention relates to the field of computer technology and can be used in communication devices of a digital computer with objects of monitoring and control.

Communication devices are known for digital computers with two-point impulse by the first sensors, containing input latching triggers, buffer triggers, NAND circuits, inverters, input and output circuits, and onros bus.

However, devices also do not have a rigid functional attachment to the temporal parameters of the output signals of the sensor, as a rule, of an electronic sensor. In practice, however, it is most often necessary to communicate with contact-type sensors (buttons, relays, etc.), giving them signals of arbitrary duration, boreholes, and fragmented due to the bounce of the closure contacts.

The purpose of the invention is to increase the reliability of work and expand the functionality of the device.

This is achieved by connecting the first output of the latching trigger to the first input of the nerve element "NOT-AND, the output of this element" NOT-AND to the first input of the buffer trgger and output bus of the channel, the second output the trigger-latch - with the first input of the second element “NOT-AND, and the output of the latter with the second input of the buffer trigger.

The first output of the buffer trigger is connected to the nerve input of the third NO-element, the output of which is connected to the first input of the latch trigger, the second output of the buffer trigger to the first input of the fourth NO-I element, and the output of the last input to the second input. trigger lock. The input bus in the channel is connected to the third. Input of the second element “NOT-N to the inverter, the output of which is connected to the third input of the third element“ NOT-AND. The onros bus is connected to the BTOpbiNt inputs of the third and second elements “NON-H of each channel and to the common inverter, the output of which is connected to the second inputs of the first n of the second elements“ NON-H.

The drawing shows a functional diagram of the device.

It contains input / and output 2, I1inu 3 polling pulses, a common inverter 4, channel 5 of the device, including trigger latch 6, buffer trigger 7, two-input elements “NON-H 8 p 9, three-input elements“ NON-I and Y /, inverter 12. Shading off the shoulder slots of the trigger arrays, at the output of which, in the initial m state, zero levels of voltage are acting.

The device works as follows. Single signals from two-position sensors are sporadically fed to the input buses. Since the signal "O (no polling from the digital computer) is acting on the interrogation bus 3, the input signal through the inverter 12 and the element NOT-10 arrives at the trigger-clamp 6 and is stored in it. Element "NOT-9 at this time prepared for operation. When a polling signal is sent from bus 3, the element NOT-AND 10 blocks the input signal, and the element NOT-AND 9 delivers a single impulse equal to the duration of the polling signal to the output bus 2 and rewrites the contents of the trigger-latch 6 into the buffer trigger 7 The “NOT-AND 10” element is blocked by the “1” signal from the right shoulder of the trigger 7, the “AND-8” element is being prepared for operation and is included in the first pause after the end of the polling pulse.

The latch trigger 6 is reset. As soon as the bus input signal is removed / removed, the element NOT-AND // becomes unlocked and the next (second) interrogation signal returns trigger 7 to its original position. The trigger 7 again prepares the element "NOT-AND 10 to receive the next source signal in pause after the second interrogation signal.

Since the period of the polling signals is somewhat shorter than the smallest period of arrival of input signals, and the duration of the polling signal is also usually less than the time duration of the input signal, the device eliminates both information loss and redundancy of the latter in a digital computer.

The split input signal does not trigger the trigger-latch 6 again, as it is blocked by the element NOT-AND 10 from the output of the right nlech trigger 7, at which the unit level acts

voltage until the input signal is terminated and unlocks the element NOT-AND 11 to pass the next interrogation signal through it.

Subject invention

A communication device of a digital computer with on-off pulse sensors, containing in each channel a trigger-clamp and a buffer trigger, elements "NOT-AND inverter and common for all channels the interrogation signal bus, characterized in that, in order to increase reliability and

expansion of functionality, in it, in each channel, the first output of the trigger lock is connected to the first input of the first NAND element, the output of which is connected to the first input of the buffer trigger and the output bus of this channel, the second output of the trigger clamp is connected to the first input of the second element "NON, the output of which is connected to the second input of the buffer trigger, the first output of which is connected to the first

the input of the third element "NOT-AND, the output of which is connected to the first input of the trigger lock, the second output of the buffer trigger is connected to the first input of the fourth element" NOT-AND, the output of which is connected to the second

the entrance of the trigger-clamp, the input bus in each channel is connected to the third input of the second element "NOT-I and to the inverter, the output of which is connected to the third input of the third element" NOT-AND, the interrogation bus

connected to the second inputs of the third and second elements "NOT-AND of each channel and with a common inverter, the output of which is connected to the second inputs of the first and second elements" NOT-AND.