SU1746358A1 - Time interval meter - Google Patents

Abstract

The meter can be used in measurement technology to measure the duration of single pulses or time intervals. The meter contains a sectioned delay line 1, a counter of 2 pulses, an AND-NOT 3 element, 4.1-4.p triggers, 5.1–5 p. 1 switchboards, a priority encoder 6, a code converter 7. 2 Il

Description

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The invention relates to a measurement technique and can be used to measure the duration of single pulses or time intervals.

The aim of the invention is to expand the range and reduce the measurement time.

Figure 1 shows the functional diagram of the meter; 2 is a diagram of its operation (as an example, the number of triggers with a latch is equal to n 5).

The meter contains a partitioned delay line 1 with n outputs, counter 2, AND-NO element 3, n triggers 4.1-4. With a latch, which in the open state at the outputs track the input signal, fix its last value in the closed state, 5.1-B.p switches, priority encoder 6, which forms at the output a binary code corresponding to an excited input (input at which a high level) with a small number of code converter 1, which forms a binary code at the output equal to the number Р А + B. Where А - binary number post drunk on the main entrances; B - coefficient equal to zero when the signal level at the auxiliary input is low and equal to n when the signal level at the auxiliary input is high, if A + B 2n, the code equal to zero is generated at the output of the encoder 1 Input of the meter is connected to the first input of the I-element NOT 3 and latching trigger input

41-4.p with latch, the main inputs of the encoder are connected respectively to the outputs of the priority encoder b, and the auxiliary input is connected to the forward output of the trigger 4.1 with the latch and to the control inputs of the switches 5.15p, the outputs of which are connected to the corresponding inputs of the priority encoder 6, and the main inputs are connected to the direct and inverse outputs of the corresponding triggers 4 1-4 n with a latch, while the direct output of the trigger 4 n with the latch is connected to the input of the counter 2, and the second input of the element AND-NOT 3 is connected to the n-output of the section ovannoy delay line 1, whose outputs are connected to respective inputs of the main triggers 1-4 to claim 4 with a latch, and the input connected to the output of AND NOT 3

The device works as follows

The initial state of the meter is set by the signal coming to the inputs Reset triggers 4.1-4. With latches and counter 2 (in Figure 1, the Reset circuit is not indicated). At the same time, at the direct outputs of the triggers 4.1-4. With a latch, a high logic level is set, since in the initial state at the input of the meter, the low level (the level, then at the output of the AND-HE element 3

and at its first entrance is high level. A high level from the output of the trigger 4.1 with a latch sets the switches 5.1-5. To the state when their outputs receive a signal from the direct outputs of the trigger 4.1-4.p with the latch.

At the inputs of the priority encoder 6 at the same time a high level and at its outputs sets the code of the number n, corresponding to the number of flip-flops 4 with a latch, which

5 is fed to the main inputs of the code converter 7. Since the code input 1 at the auxiliary input is high, a zero code is set at its outputs.

0 When a measured pulse with a duration Tx arrives at the device input (time moment ti (Fig. 2, a), a high level arrives at the first input of the AND-NE element 3 and a low level is generated at its output

5 level (Fig. 2, 6), which is delayed by each section of delay line 1 at time ta and through time PTZ enters the second input of the AND-HE element 3, prohibiting the passage of a measured pulse, after

0 ptz time to the first input of the element AND- HE 3 again goes high level. Then the process repeats for the entire duration of the measured pulse. Counter 2 records the number of 5 pulses N. on the front of it. output partitioned delay line 1 (Fig 2.d).

The decay of the measured pulse triggers with a latch fix the logical level of the signals coming from the outputs of the partitioned delay line 1 (figure 2, c, d).

Claims (1)

The invention The time interval meter containing a partitioned delay line and a counter whose output is an output of the device, characterized in that, in order to extend the range and reduce the measurement time, 0 introduced a NAND element, n-flip-flop triggers, n switches, a priority encoder and a code converter whose outputs are the lower bits of the meter output, the main inputs are connected respectively to the outputs of the priority encoder, and the auxiliary input is connected to the forward output of the first trigger with latch and to the control outputs of the n-switches, the outputs of which are connected to the corresponding inputs the priority encoder, and the main inputs are connected to the direct and inverse outputs of the corresponding flip-flop triggers, while the direct n-flip-flop triggers with the latch are connected to the counter input, the first input of the AND-NOT element is the meter It is connected to the latching inputs of n-flip-flops with a latch, and the second input is connected to the n-output of a sectioned delay line, the outputs of which are connected to the main inputs of the corresponding n-flip-flops with a latch, and the input is connected to the output of the NAND element.