SU1689938A1 - The discrete orthogonal functions simulator - Google Patents

Abstract

The invention relates to automation and computing and can be used to create generator equipment for multichannel communication systems. The purpose of the invention is to improve the accuracy of the modeled signals. The device contains a clock generator 1, a Walsh function shaping unit 2, a divider 3, 4 frequencies, a key 5. multipliers 6. Entering a frequency divider into the device makes it more accurate to match the moments of alternating signals with a uniform clock solution. 4 il. 00 yu from 00

Description

The invention relates to automation and computing and can be used to create generator equipment for multichannel communication systems.

The purpose of the invention is to improve the accuracy of the modeled signals.

FIG. 1 shows a functional diagram of the device; in fig. 2 - timing diagrams illustrating the formation of a discrete orthogonal function S (7, Q; Fig. 3 - timing diagrams of functions at the outputs of the proposed device; Fig. 4 - discrete orthogonal functions formed by the proposed device.

The device contains a clock generator 1, block 2 of the formation of the Walsh functions. dividers 3 and 4 frequencies, key 5, multipliers 6.

The device works as follows.

When pulses are received from the clock generator 1 to the clock input of the Walsh function formation unit 2, Walsz functions are formed at the outputs of block 2, fed to multipliers 6. Pulses from the clock generator 1 also arrive at dividers 3 and 4 frequencies. During the first half-period of the formation of the Walsh functions, the output of the frequency divider 4 is formed 1, as a result of which the key 5 is open (the frequency divider 4 is 2P 1), and the output of the key 5 produces a signal that coincides with the output signal of the frequency divisor 3 the division factor of the divider 3 frequency is 2).

During the second half period of the formation of the Walsh functions at the output of the frequency divider 4, O is formed, with the result that the key 5 is closed and no pulses are generated at its output. The signals O, 1 taken from the output of the key 5 are interpreted at the inputs of the multipliers b as the values -1, +1, multiplied with the Walsh functions.

The time diagrams (Fig. 2) illustrating the process of forming the function S (7, 6 $, shows the time state: the output of the clock generator 1 (a); the output of the frequency divider 3 (b); the output of the frequency divider 4 (c); output key 5 (g); output of the Walsh function corresponding to function Wa (7, 3} (e); output of the corresponding multiplier 6, on which the function S is formed (7, £ C (e).

Claims (1)

Invention Formula A device for modeling discrete orthogonal functions comprising a clock generator, a Walsh function generating unit, a key and multipliers, the clock generator output connected to a clock input of the Walsh function generating unit, the outputs of the Walsh function generating unit are connected to the first inputs of the corresponding multipliers, the multiplier outputs are outputs device, characterized in that, in order to improve the accuracy of the simulated signals, it contains two frequency dividers, with the output of the clock generator Without the first and second frequency dividers, respectively, connected to the information and control inputs of the key, the output of the key is connected to the second inputs of the multipliers. but p p p p p p p p 5Z1 JZIL II1 --CZL P SP Ш (,. ©) S С 7,0) Editor N. Tupitsa Compiled by V. Bankov Tehred M. Morgental W (o, 0) w and c) WoЈ (2, в) WoЈ (h, e) W (", b) W (5, ©) % Ј (b, c) Wag (7,6s) S (5.9) “5 (e, ©) ) "". Proofreader N. Revska