SU1688374A1 - Driver of frequency-modulated signals - Google Patents

Abstract

The invention relates to radio engineering and communications and can be used in systems of active radio and sonar. The purpose of the invention is to improve the accuracy of the formation of a given law of modulation of frequency-modulated signals. The shaper of frequency-modulated signals contains a generator of 1 short pulses, a synchronizer 2, a strobe block 3, an OR 4 element, a counter 5, an address counter 6, a trigger 7, a filter 8, a comparison block 9, a permanent storage element 10 controlled by shaper 11 pulses, algebraic adder 12 and accumulating adder 13. The principle of operation of a shaper of modulated frequency-modulated signals is based on the additive correction of the current half-period of the generated signal using the result of the previous half-period correction Oh yeah. 2 Il.

Description

cl

WITH

The invention relates to radio engineering and communications and can be used in systems of active radio and sonar.

The purpose of the invention is to improve the accuracy of the formation of a given modulation law of frequency-modulated signals.

Fig. 1 shows a structural electrical circuit of a frequency-modulated signal generator; 2 a, b, c, d, d are timing diagrams explaining his work.

The shaper of frequency-modulated signals contains a generator of 1 short pulses, a synchronizer 2, a gating unit 3, an OR 4 element, a counter 5, an address counter 6, a trigger 7, a filter B, a comparison unit 9, a permanent storage element 10, a controlled pulse shaper 11 , algebraic adder 12 and accumulating adder 13.

Shaper frequency-modulated signals as follows.

Short pulses from the output of the generator 1 zero the counter 5 (through the element OR 4J, address counter 6, accumulating the adder 13 and starts the synchronizer 2, which produces pulses of duration T, allowing the signals to pass to the output of the gating unit 3, trigger 7, and triggering the controlled driver 11 At the output of the controlled driver 11, a periodic sequence of pulses is produced with the following frequency fr, which are fed to the counting input of the counter 5.

About 00 00

with J

The incremental code (Fig. 2a) from the output of the counter 5 is fed to the first input of the algebraic adder 12, to the second input of which is fed the NTO code of the initial half period To, and, To. NTO, fr are related by the equation

Then nto t

one

fr

The result of the algebraic summation (Fig. 26) arrives at the first input of the comparison block 9, the second input of which receives the code from the output of the accumulating adder 13, the value of which when forming the initial half-period T0 is zero.

Codes ANi are entered into the permanent storage element 10, AN2 determining the differences of adjacent half-periods DT1, LT2 and calculated from the expression:

ATi ANi -J-. ir

When forming the initial half-period T0 of the signal, the ANi code (FIG. 2b), recorded at the zero address, is selected from the permanent storage element 10 and is fed to the information input of the accumulating adder 13.

When the codes (Fig.26, d) are equal, on the first and second inputs of the comparison block 9, a pulse appears on its output (fig.2d), which through the OR 4 element resets the counter 5, increases the content of the accumulating adder 13 by the amount of the selected code from the persistent storage element 10, by the time of coincidence, flips trigger 7 and increments the contents of address counter 6 by one.

Thus, successively from the persistent storage element 10, the correction codes ANi, D№

accumulate in accumulating adder 13 and after comparing with the code at the output of the algebraic adder 12 at the output of the comparing unit 9, a sequence of pulses is formed (FIG. 2d), the time intervals between which T | are equal

Ti (NTo ± Ј ANi)

1 t7

where D No 0 - corresponds to the initial installation accumulating adder 13.

The resulting pulse sequence (Figure 2d) is converted by the trigger.

12 into a two-level signal, which is filtered by filter 8 and, after gating by gating unit 3, a frequency-modulated signal with a duration T defined by the synchronizer is generated.

Further, the synchronizer 2 generates a positive potential, which prohibits the operation of the controlled driver 11 and the trigger 7 is set to

initial state.

The principle of operation of the frequency-modulated signal generator is based on the additive correction of the current half-period, the shaping accuracy of which is determined by the code size of the initial half-period NTO and the size of the sum of the correcting DM codes |, which allows without increasing the size of the constant memory element 10

improve the accuracy of the formation of a given law of modulation of frequency-modulated signals.

25

Claims (1)

Invention Formula A shaper of frequency-modulated signals containing a short-pulse generator connected in series, a synchronizer controlled by a pulse driver and a counter, a serially connected address counter and a permanent storage element, serially connected comparison unit, trigger, filter and gating unit, the control input of which is connected to the control input of the trigger and to the synchronizer output and the OR element, one of the inputs of which is connected to the installation input of the address counter and the output of the short pulse generator, the output of the comparison unit is connected to the counting input of the address counter and the other input of the OR element, the output of which is connected to the counter input of the counter, characterized in that, in order to increase the accuracy of the formation of a given modulation law of frequency-modulated signals, an algebraic adder is introduced and information accumulator the input of which is connected to the output of the persistent storage element, the output of the short pulse generator and the output of the comparison unit are connected respectively to the reset input and the clock input of the accumulating adder, the output of which is connected to one of the inputs of the comparison unit, the output of the counter is connected to one of the inputs of the algebraic adder, the output of which is connected to another input of the unit comparison, and the other input of the algebraic driver of the frequency-modulated adder is the control input of the signals. t n-k 1 G.-AL, A / r.) s ) ( d / vf ) & "E  ,