SU1401576A1 - Pseudorandom signal generator - Google Patents

Description

(21) 4115896 / 24-21

(22) 06/11/86

(46) 07.06.88. Bul No. 21 (72) V.E.Demchenko.I.O.Ya.Kapral (53) 621.374.2 (088.8) (56) USSR Author's Certificate No. 1202039, cl. H 03 K 3/84, 1984. Melik-Shakhnazarov A.M., Marka-tun MG. Correlation type digital measurement systems. - M .; Energoatomizdat, 1985, fig. 4.2.

(54) GENERATOR OF PSEUDICAL SIGNALS

(57) The invention can be used in radio engineering and information-measuring equipment. The purpose of the invention is to expand the functionality of the device. The device contains a generator of 1 clock pulses, generators 3 and 4 pseudo-random sequences and bus 5 Start. The introduction of a control unit 2, including controlled frequency dividers 6 and 7, a pulse counter 8, a trigger 9 and a switch 10, makes it possible to increase the accuracy of generating a predetermined delay between the generated sequences. 1 з, п, ф-л, 2 Il.

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The invention relates to a pulse technique and can be used in radio engineering and information measurement technology.

The aim of the invention is to enhance the functionality by providing the possibility of improving the accuracy of forming a predetermined delay between the generated sequences.

Fig, 1 shows a block diagram of a pseudo-random signal generator; in fig. 2 is a graph showing the variation in the time delay between the generated sequences.

The pseudorandom signal generator (Fig. 1) contains a clock pulse generator 1, the output of which is connected to the first input of the control unit 2, the first and second | the outputs of which are connected respectively to the synchronization inputs of the first and second generators 3 and 4 pseudorandom sequences, bus 5 Start connected to the second input of the control unit 2, the third and fourth outputs of which are connected respectively to the installation inputs of the first and second generators 3 and 4 pseudorandom sequences.

Control unit 2 comprises first and second controlled dividers 6 and 7 frequencies, pulse counter 8, trigger 9 and switch 10, the first and fourth outputs of which are interconnected and are the third output of control block 2, the fourth output of which is connected to the second and third the outputs of the switch 10, the first input of which is connected to the output of the trigger 9, the first input of which is connected to the output of the pulse counter 8, the installation input of which is connected to the second input of the switch 10, to the second input of the trigger 9 and is the second input of the switch 2 control, the first input is connected to the synchronization input of the counter of 8 pulses and to the synchronization inputs of the first and second controlled dividers 6 and 7 of the frequency, the outputs of which are corresponding to the second and second outputs of block 2

The generator of pseudorandom susnals works as follows.

Pulses of frequency fy from the output of the generator 1 clock pulses are fed to the synchronization inputs of cerv0

five

0

five

0

five

0

S

0

five

6 and the second 7 controlled frequency dividers and the synchronization input of the counter 8 pulses of the control unit 2, whose coefficients N ,, N divide and recalculate NJ which respectively form the frequencies f ,, fj. the outputs of the first 6 and second 7 frequency dividers and the necessary conversion factor of the counter 8 pulses. Pulses with frequency f. and f are received from the outputs of control unit 2 to the synchronization inputs of the first 3 and second 4 pseudo-random sequence generators, respectively, at the outputs of which pseudo-random sequences S, (t) and) are formed. When the signal is fed through bus 5 single state. Depending on the position of the switch 1O of the control unit 2, it will be set to the initial state or the generator 3 of the pseudo-random sequences or the generator of 4 pseudo-random sequences. By a signal on the bus 5 Start, the pulse counter 8 is set to the state N, which is set to its installation inputs. The pulses from the output of the generator 1 clock pulses arrive at the synchronization input of the counter 8 pulses, which subtracts them from the code recorded in the counter 8 pulses. At the end of N, the clock cycles of the input frequency f, the pulse counter 8 generates at its output a transfer signal j that sets the trigger 9 to the zero state, i.e. the duration of a single pulse formed at the output of the trigger 9 is proportional to the array N. With this pulse, the trigger 9 sets, depending on the positions of the switch 10 to the initial state, either generator 4 of pseudorandom sequences or generator 3 of pseudorandom sequences, thereby setting the delay

TD between sequences S, (t) and SjCt) equal to

N, -1-,

If at the same time f, 2, t, e, are equal to each other, the division factors N, and NJ control, are frequency dividers 6 and 7, then the delay between pseudo-random sequences S, (t)

"S (t) is constant and equal to tc (plus or minus depending on the position of switch 10). The initial value of the delay cH can be set with an accuracy of ilT - for the interval t

DT # „G,

 M.ut,

where M is the capacity of the counter 8 pulses, the third and fourth outputs of the block

from 1 N J M,

With N, the controlled dividers 6 and 7 frequencies generate frequencies that follow the ratio f, f, i.e. the delay between pseudorandom sequences S, (t) and S (t) decreases with respect to cGD (Fig. 2), and with N, "N - increases with respect to To. t.

By changing the codes N ,, N, the amount of delay T between the pseudo-random sequences S, (t) and S2 (t) is regulated, the initial value of which is set by the value of the code N ,.

Claims (2)

Invention Formula which is connected to the second entrance The pseudo-random switch signal generator with the second trigger input is the second input of the control unit, the first input of which is connected to the synchronization input of the pulse counter and the synchronization inputs of the first and second controlled frequency dividers, the outputs of which are respectively the first and second outputs of the block management I containing the clock pulse generator, the first and second pseudo-random sequence generators, the Start bus, characterized in that, in order to expand the functionality by providing the possibility of increasing the accuracy of the formation of a given 35 1401576 delays between the generated sequences, a control unit is inserted into it, the first and second outputs of which are connected respectively to the synchronization inputs of the first and second pseudorandom sequence generators, the installation inputs of which are connected respectively to control, the first and second inputs of which are connected respectively to the output of the clock pulse generator and to the Start bus. 2. The generator according to claim I, characterized in that the control unit contains the first and second controlled frequency dividers, pulse counter, trigger and switch, the first and fourth outputs of which are interconnected and are the third output of the control unit, the fourth output which is connected to the second and third outputs the switch, the first input of which is connected to the trigger output, the first input of which is connected to the output of the pulse counter, the installation input before 35 U / hL / f, f N ,. r. GH5 2 to ty t iff .2 ts i7 ts