SU1654836A1 - Statistical time analyzer of nonstationary signal streams - Google Patents

Abstract

The invention relates to information and measurement technology. Purpose The invention relates to an information-measuring technique and can be used in determining the functions of the measurement in time of the intensities of various physical processes caused by periodic excitation pulses. The purpose of the invention is to improve accuracy. The drawing shows a functional diagram of a statistical time analyzer. The statistical time analyzer of nonstationary signal streams of the invention is an increase in the accuracy of measurement of the change function. The goal is achieved in that the statistical analyzer containing the first time interval converter in the code, two counters, the first decoder, the group of elements AND, the group of channel counters, the first pulse driver and the first delay element are entered the second pulse shaper, four elements AND, the second delay element, pulse generator, NOT element, NAND element, two triggers, three OR elements, second and third decoders, demultiplexer, n-1 time interval converters into code, where ..., n, an- ETS analyzed input numbers, switch and one-shot. The proposed device allows to measure the functions of the time-varying intensities of various physical processes. 1 il. i contains the formers 1 and 2 impulse-1 ditch, the generator of 3 pulses, the elements AND 4-7, the group of elements AND 8, the elements OR 9-11, the element NOT 12, the element IS NOT 13, triggers 14 and 15, counters 16 and 17, a group of channel counters 18, a one-shot 19, a decoder 20-22, time slot converters 23 to a code, switch 24, a multiplexer 25, delay elements 26 and 27. The input of the analyzer through the imaging unit 1 is connected to the first input of the element I 4, the second input of which is under O) L and SP о oo with a

Description

the keys to the trigger output 14, the third input to the output of the element 12, and the output to the summing input of the counter 17 and the information input of the demultiplexer 25. The analyzer start input through the driver 2 is connected to the installation input of the trigger unit 14, 23, k time intervals and the input element 26 of the delay. The input of the zero setting of the trigger 14 through the OR element 11 is connected to the reset input of the analyzer and to the output of the delay element 26, which is connected via the delay element 27 to the installation input of the trigger unit 15 and the first input of the And 7 element. All but the information outputs of the counter 17 are connected in parallel to the address input of the demultiplexer 25 and switch 24, the inputs of the SHSh 9 element and the inputs of the decoder 20. The high bit output of the counter 17 is connected to the input of the HE element 12, the outputs of the demultiplexer 25 are connected to the inputs of the corresponding converters ovateley 23.1-23.k time interval in the code. The output of the decoder 20 is connected to the second input of the element AND 7, the third input of which is connected to the output of the element NOT 12. The outputs of the element OR 9 and the element NOT 12 are connected respectively to the first and second inputs of the element AND-NOT 13 and the element 5, the third input of which is connected to the trigger output 15, and the output to the control input of the generator 3, the output of the element 7 is connected to the summing input of the counter 16, the outputs of which are connected just to the inputs of the decoder 21, the output of which is connected to the signal bus of the end of measurements. The inputs of the element And 6 connected to the outputs of the element AND-NOT 13 and the trigger 15, and its output through the one-shot 19 - to the first input of the element OR 10, the output of which is connected to the reset inputs of converters 23.1-23.k time intervals in the code counter 17, and trigger 15,

The information inputs of the switch 24 are connected to the outputs of the converters (time intervals 23.1-23.k in the code, and the outputs are bitwise to the inputs of the decoder 22, the output of the generator 3 is connected to the subtractive input of the counter 17 and to the second inputs And 8.1-8, k element groups. In addition, the input, reset analyzer is connected to the inputs

I

25

. Jq 15 70

thirty

35

40

45

50

55

setting the trigger zero, the second input of the element OR 10 and the reset inputs of channel counters of group 18.1-18.ri, the outputs of the decoder 22 are connected to the first inputs of the corresponding elements of AND 8.1-Sn group, and the outputs of the specified elements of the group AND are connected to the summing inputs of the corresponding counters of group 18.1 -18, p.

The analyzer is reset to the initial state by a reset signal, which resets the triggers, counters, and time slot converters to the analyzer code.

Starting pulses corresponding to the beginnings of individual implementations of the process under study are sent to shaper 2, ensuring their standardization, and from the shaper output are fed to the start inputs of time interval converters in code 23 and the input of delay element 26 to set the required time analysis range, as well as one trigger state 14. The signals of the analyzed random flow associated with this excitation pulse are sent to the driver, which ensures their standardization. From the shaper output, the stop pulses through the AND 4 element opened for the analysis time by the trigger signal 14 are supplied to the demultiplexer 25 and to the summing input of the counter 17. The latter controls the demultiplexer 25 and records the number of stop pulses received in the analysis range. The switching of the counter 17 is carried out on the decline of the input pulse. As a result, the first of the received pulses is directed by the demultiplexer to the reset input of the first converter 23.1, the second pulse stops the second converter 23.2, and so on, until the last converter 22.k.

The capacity of the counter 17 is selected in accordance with the number of events that can be recorded in the analysis range with the addition of another high-order bit. The establishment in a single state of this additional discharge counter, records the number of incoming events exceeding the set value k, blocking through the element NOT 12 element AND 4 until the end of the analysis range.

The output pulse of the delay element 26, fixing the end of the range

on the analysis, through the element OR 11 resets the trigger 14, which blocks the flow of pulses through the element 4 and 4 to the counter 17 and demultiplexer 25. The state of all but the older bits of the counter 17 is analyzed by the element RSHI 9 and the decoder 20. High output potential Element 9 fixes that in the range of analysis events generally pass. The decoder 20 generates a low potential at the output in the case when the contents of the counter are equal to, i.e. in the range of analysis received exactly k pulses.

If there are less than k pulses in the analysis range (the highest bit of counter 17 is cleared, and the output of the decoder 20 has a high potential), the pulse from the output of delay element 27 through element 7 goes to counter 16, which records the number of realizations of the process with a smaller, than k number of events. After the completion of these operations, the trigger 15 is set to one on the falling edge of the output signal of the element 2 / delay. If a counter overflow occurs in the analysis range, i.e. the highest bit of the counter 17 is set to one state, or there are no signals at all and the output potential of the OR 9 element remains low, then through the AND 6 element connected by the trigger 15 and the NE-13 element, the one-shot 19 is triggered, which produces pulse of analyzer reset to the initial state of readiness for a new measurement cycle. If events in the analysis range have occurred and their number does not exceed k, then, through element 5, impulse generation 3 is activated, which generates control signals for recording information into channel counters 18.1–18.P, which accumulate the histogram of measurement results.

The switch 24, controlled by the counter 17, connects to the inputs of the decoder 22 the outputs of the last of the activated converters 23. The output code of the specified converter is decrypted by the decoder 20, from one of the outputs of which the resolving potential of the corresponding channel element of the 8.1-Sn group is fed. Therefore, the first pulse of the generator 3 through the selected channel element And is fed to the corresponding

rhenium

the channel counter of the group I8.1-I8.it, producing the addition of a unit to its contents.

But the decay of the generator 3 pulse is reduced by the contents of the counter 17, and through the switch 24, the outputs of the decoder 22 are connected to the outputs of the next-to-last converter from group 23. The next generator pulse records information into one of the counters 18 in a similar way according to the output code of the next time interval converter code, and also goes to the subtracting input of counter 17. Resetting the last witness

5 0 rhenium

five

0

five

0

five

It means that the reading of information from all triggered converters is over. In this case, the low potential from the output of the element OR 9 through the element 5 and 5 turns off the generator 3S and through the elements 13 and 6 turns on the one-shot 19, which generates a reset signal. The measurement cycles are repeated D1 as long as the contents of counter 16 reaches a certain set value Ы, which is fixed by decoder 21, form a signal. The end of the histogram measured by this analyzer fully reflects the shape of the function of variation in the range of analysis of the intensity of the signal stream under study. In this case, to obtain absolute intensity values, it is sufficient to separate the contents of the individual channel counters by the number S and the time step quantization step by time-slot into code converters. To simplify these calculations, the value of Ы is chosen so that its product by the quantization step of the time intervals gives an integer power of two if the conversion was performed in binary code and a power of ten in binary-ten encoding. In this case, the division operation is reduced to a comma shift in the digital codes accumulated in the channel counters.

The number of events recorded in the analysis range, i.e. the number of time-to-code converters used is also chosen to be an integer power of two, since this allows the use of standard binary counters 17 for the number of events and a multiplexer 25. However, the specified

the number can be any other, even equal to one.

Claims (1)

The invention The statistical time analyzer of non-stationary streams of signals containing the first time interval converter into a code, two counters, JQ first decoder group of elements I, group of channel counters, first pulse generator and first delay element, the output of the first decoder connected to the first inputs of elements 5 And the groups whose outputs are connected to the counting inputs of the channel counters of the group, respectively, are related to the fact that, in order to improve the accuracy, 0 of the second generator is entered into it pulses, even elements of AND, second delay element, pulse generator, NOT element, EID NOT, two triggers, three OR elements, second and third decoder 25, demultiplexer, n-1 time interval converters to code where. . ,, n, an- the number of analyzed input numbers, the switch h od novibrator. the information input of the analyzer through the first pulse shaper is connected to the first input of the first element I, whose second input is connected to the direct output of the first trigger, the third input to the output of the element NOT, and the output to the summing input of the first counter and to the information input of the demultiplexer The analyzer start input through the second pulse shaper is connected to the 0 installation input of the unit of the first trigger, the start inputs of the first and second time converters in the code, and the input of the first delay element, Set the zero of the first trigger 45 is connected to the output of the first OR element, the first input of which is connected to the analyzer's input, the second input of the first OR element is connected to the output of the first delay element and to the CQ input of the second delay element, the output of which is connected to the installation input 1 second trigger and first input, the second element AND, information outputs, except the high bit, the first counter are connected bitwise to the address input of the demultiplexer, the inputs of the second element OR and the inputs of the first decoder, the high bit output of the first counter is connected to the input of the element NO, the output group of the demultiplexer is connected to inputs of time interval converters in Code, the output of the first decoder is connected to the second input of the second element AND, the third input of which is connected to the output of the element NOT, the output of the second element OR is connected to The first inputs of the NAND element and the third AND element, the output of the element are NOT connected to the second inputs of the NAND element and the third AND element, the third input of which is connected to the forward output of the second trigger, the output of the third AND element is connected to the trigger input of the pulse generator, the output The second element And connected to the summing input of the second counter, the reset input of which is connected to the reset input of the analyzer, and the output to the inputs of the second decoder, the output of which is connected to the output signal of the end of the analyzer measurements, the first and second inputs the fourth AND element is connected to the outputs of the NAND element and the second trigger, respectively, and the output of the fourth AND element is connected to the one-vibrator input, the first and second inputs of the third OR element are connected to the one-vibrator output and the analyzer reset input, respectively, the third OR output is connected to the reset inputs time interval converters in the code, the reset input of the first counter and the second trigger input, the information inputs of the demultiplexer are connected to the outputs of the time interval converters in the code, and the outputs - to the inputs of the second decoder; the output of the pulse generator is connected to the subtractive input of the first counter and to the second inputs of elements AND of the group; the reset inputs of channel counters of the group are connected to the reset input of the analyzer.