SU1626356A1 - Device for checking pulse sequences - Google Patents

Abstract

The invention relates to a pulse technique and can be used to control automation devices and computing devices. The purpose of the invention is 3 N improving the reliability of control by ensuring continuity of control and the formation of an undistorted sequence at the output. The device contains input channels 1 in each channel 1. Comparison unit 2, the AND-NE element 3, the first 4 and second 5 triggers, as well as the first 6, second 7 and third 8 majority elements, bus 9 of task 1 and bus 11 of gating, bus 12 channel clock pulses and bus failure 13. To achieve the objective of the invention, three major elements 6-8 are inserted into the device and the second trigger 5 is inserted into each control channel. 2 ill. J.Bbmod Yu Y Os Os Yu Os ate Os Fig. T

Description

The invention relates to a pulse technique and can be used to control computerized automation devices.

The purpose of the invention is to increase the reliability of control by ensuring the continuity of control and the formation of an undistorted sequence at the output.

FIG. 1 shows the electrical structural diagram of the device; in fig. 2 - timing diagrams illustrating the operation of the device.

The device contains in each control channel an input bus 1, a comparison block 2, an AND-NE element 3, the first and second triggers 4 and 5, as well as the first, second and third majority elements 6-8, bus 9 task 1, output tires 10, 11 gates and 12 clock pulses and bus 13 Failure.

In each channel, the first input of the comparison unit 2 is connected to the output bus 10 and to the first inputs of the comparison blocks 2 of all channels, the second input to the input bus 1 of the corresponding channel and one of the inputs of the first major element 6, and the output to the first input of the I- element NOT 3, the second input of which is connected to the output of the second major element 7, and the output to the inputs of the installation O of the first and second triggers 4 and 5, whose synchronization inputs are connected to the output of the third major element 8, and the direct output of the first trigger 4 is connected to and formation input of the second trigger 5, the inverse output of which is connected to the bus 13 Failure of the corresponding channel, the information input of the first trigger 5 is connected to the inputs of installation 1 of the first and second triggers 4 and 5 and the bus 9 of task 1. The inputs of the second major element 7 are connected to tires 11 the channel gating, and the inputs of the third major element 8 are connected to the buses 12 clock pulses of the channels.

The device can control any sequence, however, for ease of understanding, consider the operation of the device when ng. input bus 1 sequence is present type meander. And since all the channels are the same, we consider the operation of one channel.

The pulse sequence from bus 1 (Fig. 2a, b, c) is fed to the input of the first major element 6 and to the second input of the comparator unit 2. From the output of the first major element 6, the pulse sequence is fed to the output bus 10 and to the first inputs of blocks 2 comparison of all channels. When the pulses coincide on

At the input of the comparator unit 2, there is a zero level at its output, therefore, the triggers 4 and 5 are in the unit state and the zero level at the inverse output of the trigger 5 (Fig. 2g).

When an extra pulse (Fig. 2a) appears at the time T1 at the output of the comparator unit 2, a unit level arrives at the first input of the element I0 NOT 3. At the time when the second input of the element AND-NOT 3 arrives at the second input of the gating pulse from the majority element 7 at the output of the element AND-NOT 3, the unit level goes to zero. As a result, the trigger 4 is transferred from a single state to a zero state (Fig. 2e). The trigger 5 also goes to the zero state, and at its inverse output a single level appears (Fig. 2g), which goes to the output bus.

0 13, indicating that the corresponding channel has failed. If further the pulses coincide, then the next clock pulse triggers 5 to its initial state.

5When the pulse disappears completely

sequences in one of the channels (fig. 2a) the second trigger 5 is constantly in the zero state, indicating the failure of the corresponding channel, and the output

0 of the majority element b passes a sequence of pulses from two other bobbins.

Claims (1)

Thus, the proposed device allows a continuous control of the role of a pulse sequence in each channel in a dynamic mode and form an undistorted sequence with two healthy channels. Invention Formula 0 A device for controlling a sequence of pulses, containing an input bus and a bus in each of the control channels Failure, an NAND element, a comparison unit and a first trigger, different 5 by the fact that, in order to increase the reliability of control by ensuring continuity of control and forming at the output of an undistorted sequence, a second trigger, as well as three major elements, the output tire of the gates tires of the corresponding control channels, are inserted into each of the control channels, the tires of the clock pulses of the respective control channels and the bus of 5 dan 1, with the output of the first major element connected to the output bus and the first inputs of the comparison blocks of all the control channels, the second input of each of which is connected to the input bus of the corresponding control channel and the corresponding input of the first major element, and the output to the first input of the NAND element of this control channel, the second input of which in each control channel is connected to the output of the second major element, and the output to the installation input O of the first and second triggers of the corresponding control channel, inputs synchronization of which in each control channel is connected to the output of the third major element, the inputs of the settings G are with the information input 0 the first trigger of this control channel and the task bus 1, while the direct output of the first trigger is connected to the information input of the second trigger of the corresponding control channel, the inverse output of which is connected to the corresponding bus Failure, and the inputs of the second major element are connected to the gates of the control channel, and the inputs of the third major element - with the tires of the clock pulses of the control channels. CCPAP pgshpppppppppppp pppgshpppppppppppp and and P g  single etuat ln. ft ".2 and P g from / gas t channel channel