SU1241467A1 - Device for checking pulse sequence - Google Patents

Abstract

The invention relates to a pulse technique and can be used in instrumentation and automation devices. The purpose of the invention is to increase the reliability that is achieved as a result of the introduction of new functional connections and the fourth trigger, which can be implemented, for example, on six AND-NOT gates. The device for controlling the pulse sequence contains triggers 1-4, input buses 5 and 6, installation bus 7 and output bus 8. Input bus 6 is connected to clock input of trigger 2, input bus 5 to clock inputs of trigger 1 and 3, the inverse outputs of which are connected respectively to the information inputs of the flip-flops 2 and 4. The inverse outputs of these flip-flops are respectively connected to the input of the installation in the log. "1 trigger 3 and the installation input to the log. “About trigger 1, the direct output of which is connected to the information input of trigger 3 and to the installation input to the log. "About the trigger 4. The clock input of this trigger is connected to the input bus 6. The installation bus 7 is connected to the installation input to the log" About triggers 2 and 3. The direct output of the trigger 3 is connected to the output bus 6. It is noted that for a more reliable installation devices reset, for example, after switching on the supply voltage, a pulse through the bus 7 of the installation must be submitted not only on the installation inputs to the log. “About triggers 1 and 3, but also to the input of the installation in the log. “1 trigger 4 (not shown). 1 il. sl JITL 1чЭ 4 :: 4 О5

Description

The invention relates to a pulse technique and can be used in instrumentation and automation devices.

The aim of the invention is to increase reliability.

This goal is achieved by introducing new connections and a fourth trigger, which can be implemented, for example, on six AND-NOT elements, which is simpler and therefore more reliable technical solution.

The drawing shows a block diagram of a device for controlling a sequence of pulses.

The device contains I-4 triggers, input buses 5 and 6, installation bus 7 and output bus 8. Input bus b is connected to clock input of trigger 2, input bus 5 - to clock inputs of trigger 1 and 3, the inverse outputs of which are connected respectively to information inputs of flip-flops 2 and 4, inverse outputs of which are connected respectively to the installation input to trigger 1 and the installation input to zero of trigger 1, the direct output of which is connected to information input of trigger 3 and to the installation input to zero of trigger 4, the clock input of which is connected nen with input bus 6, the bus 7 connected to the installation setting to zero inputs of flip-flops 2 and 3, a direct output of the last of which is connected to the output line 8.

The device works as follows.

In the initial state, the triggers 1-4 are in the zero state. First comes the impulse through bus 5, and then through bus 6. Triggers 1-4 can be triggered either by positive fronts of impulses arriving at tires 5 and b, or by negative fronts.

Let, for example, triggers 5 and b operate on positive edges of clock pulses.

With a normal sequence of impulses of sequences, after the arrival of impulses on buses 5 and b and the end of transients, the triggers 1-4 are in the zero state. The first pulse arriving on bus 5 on the front (positive in this case) sets trigger 1 to one state, does not change trigger state 3, since the logical O input was on the D input of trigger 3. A second sequence pulse then arrives on the bus b does not change the state of trigger 1 and sets trigger 4 to reset trigger 1, which in turn resets trigger 4. Thus, upon receipt of the next two pulses (one for each sequence), order 3613/55 Circulation 816 Subsidiary Branch of the PPP "Patent, Uzhgorod, Proektna St., 4

all triggers are in the zero state again. If at least one pulse of the second sequence disappears, then the trigger 1 is not reset in the interval between the two pulses of the first sequence, so the trigger 3 is set up with the second pulse; at the moment of arrival of the second (second) pulse of the second sequence at the D input of trigger 2 will be a logical "1 and the front of the second pulse trigger 2 will be set to unity with A stop from the inverse output will be set by trigger 3. When restoring the pulse alternation and the sequence, trigger 3 is automatically reset. When working in the mode of fixing single failures after trigger 3 is set to the unified state, trigger 4 cannot become unified, which, from the point of view of the device operation, is equivalent to the absence of pulses of the second sequence. To restore operation of the device, it is enough to connect inputs 5 and G for the time

5 greater than the duration of the period of the following pulses of the first sequence.

For a more reliable installation of the initial state after, for example, switching on the supply voltage, a pulse through the bus 7 of the installation is sufficient to apply not only to the inputs of the installation to zero of the flip-flops 1 and 3, but also to the input of the installation to the flip-flop 4 (not shown).

Claims (1)

Invention Formula A device for controlling a pulse train comprising an installation bus, a first, second input bus and a first, second and third trigger, a second input bus connected to a clock input of the second trigger, characterized in that, in order to improve reliability, a fourth trigger is entered into it, the first input the bus is connected to the clock inputs of the first and third triggers, the inverse outputs of which are connected respectively to the information inputs of the second and fourth triggers, the inverse outputs of which are connected respectively input setting unit in the third and to the input M setting to zero of the first flip-flops, a direct output of the first flip-flop is connected to the data input of the third 0 trigger and with the installation input to zero of the fourth trigger, the clock input of which is connected to the second input bus, the installation bus is connected to the installation inputs to zero of the second and third trigger, the direct output of which is connected to the output bus. 0 0