SU1573462A1 - Device for reception and transmission of information - Google Patents

Abstract

The invention relates to automation, in particular to control systems for receiving and transmitting commands, and can be used for communication with mobile objects. The purpose of the invention is to increase the reliability of receiving information by changing the mode of operation, depending on the type of information transmitted. The device contains a switch 1, the first 2 and second 3 registers, the decoder 4, the first 5 and the second 6 group of elements And, first 7, second 8, third 9, fourth 10 and fifth 11 elements And, the first 12 and second 13 triggers, generator pulses 14, memory block 15, counter 16, first 17 and second 18 elements OR, first 19, second 20, third 21 and fourth 22 delay elements, first 23 and second 24 information, controlling 25, first 16 and second 27 synchronizing device inputs, the first 28 and second 29 data, the first 30 and second 31 control outputs of the device. The device allows the command transmitted in the information message to go into the mode of receiving information on a more accurate communication channel. 1 il.

Description

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bots in addition to the type of information transmitted. The device contains the Switch 1, the first 2 and the second 3 of the register, the decoder 4, the first 5 and 4 6 groups of elements Ii, the first 7, the second 8, the third 9, the fourth 10 and the fifth 11 elements And, the first 12 and the second 13 triggers, generator pulses 14, memory block 15, counter 16, First 17 and second 18 elements OR, first 19, second 20, third 21 and

The invention relates to automation, in particular, to control systems for the transmission and command transmission, and can be used for communication with mobile objects.

The purpose of the invention is to increase the accuracy of receiving information by changing the mode of operation depending on the type of information transmitted.

The drawing shows the functional diagram of the device.

The device contains a switch 1e first 2 and second 3 registers, decoder 4, first 5 and second 6 groups of elements I, first to fifth elements And 7-11, first 12 and second 13 triggers, pulse generator 14, block 15 memories, counter 16, first 17 and second 18 OR elements, the first to 1 h and the fourth delay elements 19-22, the first 23 and the second 24 information, control 25, the first 26 and the second. 11 synchronization inputs of the device, the first 28 and second 29 informational, the first 30 and second 31 control outputs of the device.

The device works as follows.

In the initial state, all nodes and elements are reset to the zero state (the zero-setting circuits are not shown in the drawing). Information input 23 is connected to the output of the first (coarse) channel, and input 24 is connected to the output of the exact second channel.

Since the trigger 13 is in the zero state, the high potential from the inverted output, which is resolving, is fed to the first control input of the switch, and to the second control input of the switch - the signal

the fourth 22 delay elements, the first 23 and second 24 information, control 25, the first 16 and second 27 synchronization inputs of the device, the first 28 and second 29 information, the first 30 and second 31 control outputs of the device. The device allows the command transmitted in the information message to go into the mode of receiving information on a more accurate communication channel. silt

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ban low potential with a single exit.

As soon as the coarse channel from output 23 receives a call signal for communication, the code of this signal through switch 1 enters the information inputs of register 2, where it is entered by a clock pulse coming through the first element AND 7 and the element OR 17 at the synchronous input of register 2 .

This code is decoded by the decoder 4, which opens the corresponding element AND 5 of the first group with a high potential at one of its outputs, to the other inputs of which, with a delay on element 19, the same sync pulse arrives. Passing through the open element I at the other input, a pulse arrives at the readout input of the fixed cell of the memory unit 15 and reads its contents to the information inputs of the register 3, to the sync input of which the sync pulse delayed by the delay element 20 is read at the read time.

The contents of the fixed memory location corresponding to the input code are output from register 3 to output 28 for display on the display screen of a user operator.

If the received message contains an order to connect to the exact channel, the last element AND 5 of the first group opens from the decoder 4, the output of which also sends a pulse to the single input of trigger 12, which goes to the single state and high potential from the direct output opens the elements of And 9 and 10.

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Another input element And 9 receives a pulse from the output of delay element 20, which, having passed element And 9, is output to output 31 as a command to Lift the antenna of the exact channel.

As soon as the antenna is rising

will expire, a transfer pulse appears at the output of counter 16, which cuts off the coarse channel and connects the second one by setting trigger 13 to one state, at which the resolving potential is supplied to the second control input of the switch and the inhibitory potential to the first control input of the switch. In addition, the transfer pulse of the counter through the element OR 18 resets registers 2 and 3 and the zero state to the zero state trigger 12, and also through the delay element 21 resets the counter 16 to the initial state.

Through the second information input 24, an order codogram is received, which enters register 3 and is displayed on the display screen from output 28. A confirmation of the receipt of this order should be issued to the received order from the moving object, so the operator user presses the key on the control panel keyboard The confirmation, the signal from which is fed to the input 25. Then through the elements And 6 of the second group, the contents of the received order from the output of the register 3 are rewritten to the output 29 to the address of the control center.

After the confirmation is transmitted by the same signal, the delayed element 22 of the delay for the confirmation transmission time, the trigger 13 is reset to the initial state, the registers 2 and 3 are reset to the initial state through the OR element 18. The same pulse through the element 11 is given to the output 30 of the device as a command to lower the antenna.

Thus, the device allows to increase the reliability of receiving information by changing the mode of operation depending on the type of information transmitted.

Claims (1)

Invention Formula A device for receiving and transmitting information comprising a switch, ten 15 20 25 thirty 35 40 45 50 55 B26 the first and second information inputs of which are, respectively, the first and second information inputs of the device, the switch output is connected to the information input of the first register, the output of which is connected to the information input of the decoder, the corresponding outputs of which are connected to the first inputs of the same name elements of the first group, the outputs of which are connected to the corresponding inputs of the memory block, the output of which is connected to the information input of the second register, the first element OR, whose output is connected to the clock input of the first register and the input of the first delay element, the output of which is connected to the second inputs of the AND elements of the first group and the input of the second delay element, the output of which is connected to the clock input of the second register, the second OR element, the third delay element, characterized in that in order to increase the reliability of receiving information by changing the mode of operation depending on the type of information transmitted, a fourth delay element, a pulse generator, the first, second, third, fourth and fifth elements are introduced into it The units And, the elements of the second group, the first and second trigger, the counter, the first inputs of the first and second elements And are respectively the first and second synchronization inputs of the device, the outputs of the first and second elements And are connected respectively to the first and second inputs of the first element OR, output The second delay element is connected to the first input of the third element And, the output of which is the first controlling output of the device, the output of the last element And of the first group is connected to the first input of the first trigger, direct output D of which is connected to the second input of the third element I and the first input of the fourth element I, to the second input of which the output of the pulse generator is connected, the output of the fourth element I is connected to the counting input of the counter, the output of which is connected to the second input of the first trigger, the input of the third delay element, first the input of the second trigger and the first input of the second OR element, the output of which is connected to the resetting inputs 715734628 the first and second registers, the output of the second OR elements of the trigger and the perp of the last one are connected to the first input-to input of the fifth element AND, in the output of the corresponding elements, And the second of which is the second control groups and are the first information output device, inverse output device outputs, the input of the even-first trigger is connected to the second in the solid delay element is connected with the input of the fifth element And, the inverse the combined second inputs of the element-output of the second trigger is connected to The second group of the second group is the control-second input of the first element and the device's current input, the outputs of the JQ first control input of the commutator points of the second group are the second, the direct output of the second flip-flop The information outputs of the device are connected to the second input of the second element, the output of the fourth element of the AND block and the second control input Dfrzhki connected to the second inputs of the switch.