SU1539792A1 - Device for determining throughput of network - Google Patents

Abstract

The invention relates to computing and communication technology, in particular to devices for assessing network bandwidth. The purpose of the invention is to expand the field of application of the device due to the dynamic assignment of the poles (type of network) and bandwidth capabilities of the network channels. The topology of the analyzed network is implemented in the device's dial-in field. For each channel of the network from the source data setting block, the value of its bandwidth is set, which is stored in the corresponding group memory block, as well as the information about the origin and end of the channel peaks to the correspondent or network subscriber, which is stored in the corresponding cells of the memory blocks. The vertices belonging to the correspondents of the network, with the help of one of the switches, are combined into the initial dummy pole, and the vertices belonging to the subscribers of the network, with the help of other switches into the final dummy pole. The task of determining the throughput of a multipole network is solved by finding the minimum cross section separating the initial dummy pole from the final dummy pole. The minimum cross section is in device operation mode 1 by analyzing all possible combinations of network channels. The result of the analysis is expressed in units of network bandwidth, as well as the number of channels forming the first minimum cross-section, and is displayed on a digital indicator. In addition, the digital display shows the numbers

5G 06F 15/353 in the “Predicting Filter” Moscow Ordzhonikidzekotov Sergo Aviation Institute named after Vladimir Vladimir

Description

The invention relates to computing and communication technology, in particular, to solving problems of estimating the throughput capacity of a communication network on graphs.

The purpose of the invention is to expand the use of the device by

- dynamic assignment of the poles (type of network) and bandwidth capabilities of the network channels.

The drawing shows a block diagram of the proposed device.

A device for determining network bandwidth contains a block

1 combining combinations, triggers 2 of the first group, first key 3, counter 4, keys 5 of the first, 6 second and 7 third groups, dial pad 8, block 9 of comparison, blocks 10 of memory of the group, adder 11, first register 12, second register 13, triggers 14 of the second group, first memory block 15, driver of 16 pulses, element OR 17, second key 18, third key 19, block

20At the original data generator

21 control sequences, descrambler 22 channel numbers, descrambler 23 initial vertices, descrambler 24 final vertices, second 25, third 26, fourth 27 and fifth 28 memory blocks, first 29, second 30, third 31 and fourth 32 switches, element 33 delays and digital indicator 34.

The device works in two modes.

In the first mode, the network bandwidth and the combination of channels forming the first minimum cross section are determined, and in the second mode, the combinations of channels forming the second and subsequent minimum cross sections (if any in the network exist) are determined.

In the initial state, the topology of the network in the dial-up field 8 is implemented by connecting the corresponding information inputs and outputs of the keys 5, the inputs representing the initial and the outputs are the final vertices of the channels.

To analyze a specific multipole network in order to determine the value of bandwidth and combination of channels forming the first minimum cross section, the first operation mode of the device is set, for which a reset signal is output from the source data setting unit 20, which comes to and, on the first output, outputs the corresponding pulse sequence, closing the third key 19, which triggers triggers 2 and 54, blocks 13, 12, 15 and records units to all bits of block 13. At the same time, keys 5 and 6 are open, Steel keys are closed.

From the source data setting unit 20, a Mode I signal is output to the input of the generator 21, which generates and outputs the corresponding sequence to the second output.

pulse impulse counter 4.

From the source data setting unit 20, the channel order number (, K) that goes to the channel number decoder 22 is sequentially set for each channel, and CK is the value of its throughput, which goes to the group of memory blocks 10.

Information about the belonging of the initial vertex of the channel to the correspondent or to the transit or to the subscriber of the network arrives at the decoder of 23 initial vertices, which has the following truth table:

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The information about the belonging of the final vertex of the channel to the correspondent or to the transit or to the subscriber of the network arrives at the decoder 24 final vertices, which has a similar truth table. s

The K-channel information termination signal is fed to the input of the generator 21, which outputs to the seventh output a single pulse strobe the operation of the decoder 22 of the channel number. The signal from the K-th output of the decoder 22 of the channel number is fed to the recording inputs of the K-th block 10 of the memory of the group and all the Kx cells (the memory of blocks 25-28 of the memory and allows storing information stored at their information inputs

Upon completion of entering the initial information

the capacity values of all the K channels of the network are recorded in blocks 10 of the group memory;

the cells of the second memory block 25 store information about the belonging of the initial vertices to the network correspondents;

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the cells of the third memory block 26 store information about the belonging of the initial vertices to the network subscribers;

the cells of the fourth memory block 27 store information about the end vertices belonging to the network correspondents;

The cells of the fifth memory block 28 store information about the belonging of the final vertices to the subscribers of the network.

Starting from source data block 20, a Start signal is sent to the input of generator 21, which sends a starting pulse to the sixth output, which goes to the gate inputs of all switches 29-32, which, according to the signals on their information inputs, perform physical switching of dummy poles , while the first 29 and third 31 switches connect the K + 1th output of the brute force unit 1 to the vertices that are network correspondents, and the second 30 and fourth 32 switches to the control input of the first key 3 to the vertices, Network subscribers. Switched initial vertices of the K channels are information inputs, and the final ones are information outputs of the corresponding keys 5.

The trigger signal, delayed in delay delay element 33, for the time required for triggering switches 29-32, is fed to the start input of block 1 of combinations, which sequentially one after the other, outputs to its K outputs combinations of K network channels one, two and t .d in the form of single signals, as well as a rectangular impulse to its K + 1st output when issuing each combination.

A square pulse from the K + 1-th output of the block 1 busting combinations is fed to the input of the direct count of the counter 4, from the output of which information about its current state is fed to the information inputs of the second 18 and third 19 keys. When signals from the outputs of block 1 enumerate combinations to the setup inputs are received, the corresponding triggers 2 issue single signals to the control inputs of the keys 5, which disconnect the information inputs from the outputs and thereby break the connections between some vertices.

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Rectangular impulse, do-; The first output of the first 29 and third 31 switches, with the combination of the initial and final dummy poles (i.e., the current combination of channels is not a cross section of the analyzed multipole network) The second output of the second 30 and fourth 32 switches goes to the control input of the first key 3, disconnecting its information input from the output. Therefore, the direct 5-coal impulse arriving from the K + + 1-th output of the combination search block to the information input of the first key 3 does not pass to its output. The falling edge of the rectangular impulse coming from the K + 1-th output of the block 1, through the combination of combinations to the first reset inputs of the flip-flops 2, is transferred to the initial (zero) state.

This is how the device works until the next combination of channels forms a section of the analyzed multi-pole network, as a result of which the rectangular impulse from K + 1-th output of block 1 of combination sweep does not pass to the control input of the first key 3 and does not disconnect its information input from the output . Then the rectangular impulse, coming from the K + 1-th output of block 1, through the combinations of information to the information input of the first key 3, passes through those keys 6, which are opened by single signals of the flip-flops 2, to the read inputs of the corresponding blocks 10 of the group memory. The bandwidth values of the channels of the current combination from the outputs of the respective blocks of the 10 memories of the group are fed to the inputs of the adder 11. The total value of the bandwidths of the channels of this combination,. the network being analyzed is fed to the input of the first register 12, in which it is stored, and is fed in parallel code to the first information input of the comparison unit 9 and to the information input of the second register 13. The bandwidth value stored in the second register 13 is received on the second information input of block 9 comparison.

Comparison of the values of bandwidth arriving at the first

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and the second information inputs of the comparison unit 9, is produced when a pulse arrives at its gate input from the output of the first key 3.

In case of equal capacities, the signal from the output Equal to the comparison block 9 is fed to the control input of the second key 18, which passes information about the current combination number from the output of the estimator 4 to the input of the first memory block 15, where it is stored.

If the bandwidth value arriving at the —first information input of comparator unit 9 is less than the value arriving at its second information input, then the signal from the output is smaller than the comparator block 9 through the OR 17 element passes to the input of the imaging unit 16 pulses. From the output of the pulse shaper 16, a square pulse arrives at the reset input of the first memory block 15 and erases all the information stored there, as well as the input of the second register 13, which stores the bandwidth value received at its information input from the first register output 12. In addition, the rectangular impulse of the output of the former 16 is fed to the first reset inputs of the flip-flops 14, transferring them to the zero state, and to the information inputs of the keys. va duration rectangular pulse output from generator 16, must be less than the duration of the rectangular pulse supplied from the K + 1-ro output unit 1 umklapp combinations. Therefore, a rectangular pulse from the output of the imaging unit 16 passes through the keys 7, which are opened by single signals from the outputs, the flip-flops 29 corresponding to this combination, to the installation inputs of the same-name flip-flops 14s with the falling edge transferring them to the single state. The coded number a of the triggers 14 is displayed on the digital indicator 3.

All sections detected during operation of the device are treated in a similar manner.

After iterating through all the combinations, the unit state of one or other triggers 14. determines the channel numbers of the first minimum cross section.

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detected during operation of the device (the channel numbers are displayed on the digital indicator 34); the numbers recorded in the first block 15 of the memory are the numbers of the combinations that form sections of the same minimum bandwidth (if there are such in the analyzed polar network). The network bandwidth recorded in the second register 13 is displayed on the digital indicator 34.

From the source data setting unit 20, a Read signal is sent to the input of the generator 21, which generates and outputs the corresponding pulse sequence controlling the output of information on the number of combinations stored in the first memory unit 15 to the digital indicator 34. As a result, the numbers of channel combinations forming the second | And the subsequent minimum cross sections (if there are any in the analyzed multipole network) are sequentially displayed on the digital indicator 34.

To determine the combinations of channels forming the second and subsequent minimum network cross sections, a second mode of operation of the device is established. L5 In this case, from the source data setting unit 20, a Reset signal and a Mode II signal are sent to the input of the generator 21, which generates and outputs to the fourth output the corresponding pulse sequence, opening the third key 19 and entering into the counter 4 the number of pulses equal to its full capacity. (

From the source data setting unit 20, information about one of the H numbers displayed on the digital combination indicator 34 is output to the input of the generator 21, which generates and outputs to the third output a corresponding sequence of H pulses. This sequence is fed to the input of the countdown counter 4 and sets the value of counter 4 to its full capacity minus N.

From block 20, the initial data is given a Start 1 signal.

After block 1 issues a H-th combination, the counter 4 issues an overflow pulse through the open third key 19 and the OR element 17 to the input of the imager 16, which produces a rectangular pulse, the leading front of which knocks the trigger 14. the output of the imaging unit 16 passes through the keys 7, which are opened by single signals from the outputs of the flip-flops 2, which turned out to be in a single state when the H-th combination is issued, to the installation inputs of the same-named flip-flops 14, by the falling front - transferring them to a single state. The numbers of the cocked flip-flops 14, displayed on the digital indicator 34, correspond to the numbers of the cross-section channels formed by their Hm combination.

Similarly, there are combinations of channels forming the remaining minimum sections.

Claims (1)

Invention Formula A device for determining network bandwidth, comprising a combination search block, the first and second groups of K triggers, the first and second keys, the counter, the first, second and third groups of K keys, a dial pad, a comparison block, a group K of memory blocks, an adder, the first and the second registers, the first memory block, the pulse shaper, the OR element, and the K-th output of the combination search block (, ..., K) is connected to the setup input of the K-th trigger of the first group, and (K + 1) -th Vykhfd is connected to the first reset inputs of triggers of the first group, information the input of the first key and the input of the direct count of the counter, the output of the K-th trigger of the first group is connected to the control inputs of the Kx keys of the first, second and third groups, the information input and output of the K-th key of the first group are connected to the K-th output and the input of the input field, respectively, the output of the first key is connected to the information inputs of the keys of the second group and to the gate input of the comparison unit, the output of the K-th key of the second group is connected to the read input of the K-th memory block of the group whose output is connected to the K-m information input adder, the output of which is connected to the information input of the first register, the output of which is connected to the information input of the second register and the first 0 five 0 five 0 five 0 five 0 five the information input of the comparison unit, the output of the second register is connected to the second information input of the comparison unit, the Output Less than which is connected to the first input of the OR element, the output of which is connected to the input of the pulse former, the output of which is connected to the first reset inputs of the second group triggers , the first reset input of the first memory block and the second register entry input, the output Equal to the comparison unit is connected to the control input of the second key, the output of which is connected to The input is connected to the first memory block, and the input is connected to the output of the counter, the output of the K-key of the third group is connected to the installation input of the K-th trigger of the second group, characterized in that, in order to expand the field of application of the device by dynamically assigning poles network) and bandwidth capabilities of the network, a third key, a source data setting block, a control sequence generator, a channel number decoder, starting and ending peaks, from the second to the fifth memory blocks, four switches and the delay element, while the outputs of the initial data setting unit are connected to the corresponding inputs of the control sequence generator, information inputs of the channel number decoders, initial and final vertices, group memory blocks, the first output of the control sequence generator is connected to the second trigger inputs of the first and second triggers groups, the first control input of the third key, the reset inputs of the adder and the first register, the second reset input of the first memory block and the installation input of the second register The country, the second and third outputs of the control sequence generator are connected to the reset input and the countdown count input, respectively, a quarter output of the control sequence generator is connected to the pre-record input of the counter and the second control input of the third key, the fifth output of the control sequence generator is connected to first read input