SU1310838A1 - Device for simulating the queueing systems - Google Patents

Abstract

The invention relates to automation and computing techniques and can be used for statistical simulation of queuing systems with absolute priorities. The aim of the invention is to expand the functionality of the device by determining the residence time of the application in the system. The device contains a group of service simulation channels. each of which contains a generator of an incidental flow of pulses, counter 2 quotation, first prohibition element 3, first element AND 4, counter 5 unsuited service, first element OR 6, reversible counter 7, second element AND 8, third element OR 9, third element 10, generator II pulses, block 12 random time delay, the second element OR 13, trigger 14, the counter 15 served by the wok, the second element 16 of the ban, block 17 search, block 18 of the queues, timer 19, adder 20 and switch 21. In the device also includes a generator 22 clock pulses c, the generator 23 random pulses from the grooves and the group of elements OR 24. The device allows to obtain for each stream the average queue length, the probability of service and the probability of denial of service, as well as the average residence time of the application in the system. 8 il. with 5 (L 00 00 c.

Description

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The invention relates to automation and computing and can be used for statistical simulation of queuing systems with absolute priorities.

The aim of the invention is to expand the functionality of the device by providing the possibility of obtaining the temporal characteristics of the system.

FIG. 1 shows schematically the device j in FIG. 2 is a block diagram of a random time delay in FIG. 3 is a diagram of the switch in figure 4

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- Distributor circuit, in FIG. 5 is a block search block diagram; in fig. 6 - timer circuits; FIG. 7 is a diagram of a switch switch sweep in FIG. 8 is a block diagram of a queuing unit cell.

A device for simulating queuing systems (Fig. 1) contains a generator 1 of a random pulse stream, a group of service simulation channels, each of which includes a counter 2 of the wok, a first bar element 3, the first element of And 4, a counter of 5 unmanaged applications, the first element OR 6, reversible counter 7, second element, AND 8, third element OR 9, third element AND 10, pulse generator 11, random time delay block 12, second element OR 13, trigger 14, counter 15 served, second element 16 ban, block 17 search a unit 18 queues, a timer 19 ,, adder 20 and switch 21 J

The device also includes a generator of 22 clock pulses, a generator of 23 random pulses of failures and a group of elements OR 24.

Block 11 random time delay (Fig. 2) contains the trigger 25 pulse generator 26, the element 27 of the BAN, AND 28 element, the element OR 29, the sensor 30 random codes, the element NOT 31, the counter 32, the element OR 33, the element AND 34.

The switch (fig.Z) 21 contains the valves 35 and the elements OR 36 and 37.

Each valve 35 contains (Fig 4) elements And 36 - 39, the delay element 40, triggers 41 and 42.

five

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The search block 17 contains (FIG. 5) the first 43, the second 44 triggers, the first 45 and the second 46 And elements, the circular shift register 47. 5 Timer 19 contains (FIG. 6) delay elements 48 and 49, pulse generator 50, sweep switch 51, memory blocks 52, 53, counters 54 and 55

The switch 51 sweep contains 0 (Fig. 7) elements And 56, the element OR 57.

The queue block 18 contains (FIG. 8) queue cells 58, each of which consists of the first 59, the second 60 and 5 of the third 61 triggers, the first 62 and the second 63 And elements and the prohibition element 64.

In the initial state on the reversible counters 7, the zeros, the triggers 14 0 are in the zero state. The unit potentials from the zero outputs of the flip-flops 14 keep the AND 10 elements in the open state. Prohibit elements 3 and 16 are open, since their control inputs contain zero potentials, triggers 60 and 61 are in the zero state, the trigger 59 of all cells except the first is in the state O, and the trigger 59 is the first cells are in state 1, triggers 25 are in zero, and prohibition elements 27 are open. The pulses from the outputs of the pulse generators 26, having passed through the prohibition elements 27, do not pass 35 d t through the elements 28, since they are kept in the closed state by a zero potential from the single outputs of the trigger 25, in the circular registers 47 of the shift 1 are written in the last bit is de, and in the remaining bits O.

The switch 51 is intended to be connected to the counting input of the counting 5–55 clock pulses of one due to the queue in accordance with the indication of waiting places made from the memory block 52, the timer memory. In this case, each of the places of the Q block of the queue is connected to the counter 55 by a unit in one of the bits of the indicative part of the cells of the memory block 52 of the timer memory.

The duration of the time pulses cf at the output of the generator 50 pulses must be equal to the full sweep time of the timer memory and synchronized with the frequency of the generator 22 clock pulses of the device.

A clock generator 22, a sweep counter 54, and delay elements 48 and 49 provide for sequential polling of memory blocks, timer memory, and synchronization of read and write processes. The frequency of the common generator 22 must provide a complete memory sweep for the duration of one time pulse received from the generator output 50 pulses.

The device works as follows.

Consider the operation of the device on the example of the second channel. The pulses of the generator 1 of a random stream of pulses, simulating the input flow of the service request, pass through the open element of prohibition 3 and are fed to the summing input of the reversible counter 7, which counts the incoming pulses, and to the input of the block 18 of queues, imitating tie for vkami cells (places) in the queue. In block 18 of the queues, a free cell is searched (the state of the cells is Occupy, Freely simulated by triggers), one of the triggers 61 is occupied, i.e. one of these trigger

from the state it is transferred to the state. This is the case. At the same time, the block 18 translates into a busy signal to one of the bit inputs of the timer 19.

Block 18 of the queues (Fig. 8) works as follows.

The triggers 61 simulate the waiting conditions of the simulated mass maintenance system. The receipt of the next service request corresponds to the occupation of a free cell. This process is simulated by the appearance of a signal at the input that interrogates the elements AND 62 and passes one of these trigger 60, if the corresponding trigger 59 is in one, and trigger 61 is in the zero state, while trigger 60 is thrown into one state setting trigger 59 at zero

first, and the trigger 61 - in a single soma. the contents of the cell block 53 of50

This, while the trigger 59, after the duct of the block cell, is transferred to a single state. At the completion of the application service, the signal from the output of the delay unit 12 enters through the open element I 63, setting the corresponding trigger 61 to the zero state, imitating the release of the queue slot.

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15 20 25 in

thirty

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The control input of the element 64 is used to prevent the flip-flop 61 of the subsequent cell from being switched to a single state when it is occupied by the application of the queue cell.

The unit potential of the corresponding cell 58 of the output of the queue block is supplied to one of the inputs of the corresponding AND 56 element of the timer sweep switch, thereby marking the corresponding one. the memory block of the timer, in which the residence time of the system is stored.

Timer 19 works as follows.

In memory block 53, codes of durations of time intervals in the system are stored, and in memory block 52, codes of waiting places in a queue are stored.

Addresses of the next memory cell. enter the counter 54. The read strobe from the delay element 48 enters the input of the memory blocks 52 and 53. As a result, from block 52, an indication of a wait cell (place) is delivered to the sweep switch input and one of the elements 56 is opened. At the counter 55 there are clock signals; the end of the reading from block 53 records the contents of the selectable timer memory cell. If a time pulse arrives at the open element And 56 from the generator 50, then the last one, passed through the OR element 57, adds one to the contents of the counter 55. After the time determined by the delay element 49 in the recording gate, the contents of the counter 55, depending from the position of the switch 21, either is rewritten to block 53, or to the accumulating adder 30. The signal from the generator 22 changes the contents of the counter 54 and the process repeats, but from the next timer memory cell. In this way . the contents of the cell block 53 of

varies with the frequency of the pulse generator 50.

The block records and stores information about the duration of the time intervals of the application in the system and the characteristics of the queue (places) waiting cells. Between the arrival of the clock pulses from the output of the pulse generator 50, a full unwind occurs.

51

the timer memory and then the cycle repeats.

From the moment the queue for the entry in the memory cell corresponds to the corresponding slot in the queue block, a unit is added to the stored result with each arrival of the pulse from the generator of 50 clocks, which corresponds to an increase in the residence time of the clock sequence,

A single potential from the outputs of the bits of the reversible counter 7 through the element OR 9, the open elements of the prohibition 16 and 10 initiates the generator 11 of pulses, and through the element OR 24 closes the element 16 of the prohibition of the third channel, prohibiting the maintenance of the application from the third stream in case of its arrival. A pulse from the generator output 11 of the second channel pulses is fed to the start input of the block 1 2 random time delay, which simulates a random application servicing time, sets trigger 14 to one state, closes the AND 10 element and stops the pulse generator 11, and enters input block 17 search.

Block 12 random time delay works as follows.

With the arrival of a pulse from the pulse generator 11 at the block start input, the random code sensor 30 generates a code that, converted by means of NOT elements 31 to inverse, is written to counter 32. The signal from the output of the element OR 33 sets the trigger 25 to one. A single potential from a single output of the trigger 25 opens element I 28, through which pulses from the generator 26 of pulses begin to flow to the counting input of counter 32 through the open prohibition element 37. When the counter 32 overflows, an impulse appears at its output, which through the OR element 29 sets the trigger 25 to the zero state, thus closing the AND 28 element. The same impulse arrives at the output of the block as an impulse simulating a served charge. Delay time pulse unit 12 random time delay is determined by the value of a random code generated by the sensor 30 and the period

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pulse repetition from the output of the generator 26 pulses.

During the operation of the random time block 12, the following extreme situations may occur: the random code sensor 30 generates a code, in all of which there is one; The sensor 30 of random codes generates a code in which all rows have zeros. In the first case, the operation of the unit is similar to that described. The time delay at the same time. In the second case, the function of the element OR 33 is performed by the element

J5 and 34. The delay time is minimal and is determined by the response time of the block elements.

The search block 17 simulates the search process for the application being serviced at the current moment. The pulse from block 11 is fed to the input of the register 47, the shift recorded in it 1 one step (cycle) to the right, the unit potential at the output of the corresponding bit, and the input of the trigger 43, which is converted to one state, opening the element And 45 , And 46. At the same time, a high potential is established at the input of the trigger 44, since at the second input

element 45 and there is a single potential with a single trigger output of 14. If during servicing of the application a service-failure occurs

35 device, the pulse from the generator output 23 of the random failure stream through the open element I 46 delivers to the second input of register 47, returning 1 one step to the left.

40 To prevent further shift 1 in register 47 in case of repeated failures of the servicing device prior to the start of servicing a new application from the trailing edge of the pulse trigger

45 44 is transferred to the single state, the trigger 43 is set to the zero state, thus closing the AND 46 element. A pulse delayed for a random time from the output of the block 12

The 5Q random time delay through the element OR 13 sets the trigger 14 to the zero state, tsitkru the end of service applications, and increases by one unit

55 counters 15 served quotations. The same impulse goes to the subtracting input of the reversible counter 7, reducing its content by one, and to the input of the block 16 queues, simulating the release of one place in the queue, and the input of the switch 21, fixing in it the corresponding vacated cell block queue distributor

At the same time, the switch 21, at the next timer sweep cycle for the distributors fixed in it, passes the write strobe pulses from timer 16 to the control input of accumulating adder 26, providing the counter 55 to the accumulated result, and prevents the write strobe pulse from passing to the block input 53 timers, leaving in the corresponding cell of block 53 the zero result remaining when reading the contents in counter 55,

The switch 21 is designed to switch the gate output of the timer recording to the block 53 or to the accumulating adder 20 and works as follows.

Received at the input of the switch (Fig. 3) the impulse to stop servicing the application polls the elements And 37 (Fig. 4) of all distributors, and in the presence of high potential from the output of the search unit of one of them passes to the single input of the trigger 42 throwing to the unit state, setting a high potential at the first inputs of the corresponding elements 36 and 38, by the way, the cell (place) of the queue is fixed, which is released from the application and its residence time must be copied from block 53 through counter 55 to the accumulating adder then it occurs when the next scan timer, the output of which write strobe pulse through the open AND gates 38 and OR distributor switch 36 is supplied to a control input of the accumulator by reading the contents of the counter 55 to an accumulator. From the trailing edge of the write strobe pulse delayed by the delay element 40, the trigger 41 is set to one and sets the trigger 42 to the zero state, allowing the next write strobe pulses to pass through AND 39 and OR 37 to the second switch output.

Imitating the filling of all places in the queue, the element-and B gives. Signal, which through the element OR 6 zakrgea

element 3 of the prohibition and opens the element And 4. Counter 5 begins to count the application pulses lost due to the filling of all the places in the queue. Let, during servicing, the applications from the second stream come for a pulse from the generator 1 of a random stream of pulses in the first channel. This impulse, passed through the open element 3 of the prohibition, goes to the summing input of the counter 7. As a result, the output of the element OR 9 of the first channel is a signal that closes the element 16 prohibiting the second channel, and through the element OR 17 - the element 16 banning the other channels imitating the blocking of the arrival on the servicing device of the lower priority orders. In addition, the signal from the output of the element OR 9 of the first channel is fed to the control inputs of the blocks 12 of the random time delay of other channels, closing in them the element 27 of the prohibition. As a result, the flow of pulses to the counting input of the counter 32 of the block 12 of the random time delay is stopped, thus simulating the interruption

serving applications with preservation of interim results. Together with this signal from the output element. OR 9 of the first channel through the open element And 10 starts the generator 11 pulses of its channel, simulating the arrival

35 per serving device for applications from the first stream.

At the end of the service of the application from the first flow, the prohibition element 27 is opened in block 12 of the random time delay, the second delay of the second channel, and the pulses from the pulse generator 26 begin to flow again to the counting input of the counter 32, thereby simulating the resumption of service from

45 second stream from interrupted location.

Suppose that during servicing for the iki from the second thread, the serving npt..oopa fails. Imitating a service device failure, the generator 23 of a random stream of failure pulses produces a pulse that for the duration of its duration prohibits the operation of the generator 11 pulses, and through the elements of OR 6 for55 it covers the prohibition 3 and opens the AND 4 elements in all channels, closing the queue for for wok all streams. Counters 5 start counting applications lost due to the closure of the queue. In addition, the impulse with. generator output 23 through the element OR 13 Sets the trigger 14 of the second channel to zero. The same impulse arrives at the input of the prohibition of the operation of the block 12 of the random time delay, wrapped the counter 32 in it and set it through the element ШШ. 29 to the zero state trigger 25, simulating the loss of intermediate service results of the application. The application itself remains in the queue and, after the servicing device has been restored, its new service begins again. The device works similarly when simulating QS with an arbitrary number of service request flows.

The device allows to obtain the following characteristics of the CMC: the probability of servicing the application of each stream, the probability of failure. servicing of applications for each flow due to the filling of all places in the queue or closing the queue for the time of service device failure, the average queue length, the applications for each flow, the average residence time of the applications for each flow in the system.

These characteristics can be obtained from the readings of the i-ro measuring channel clock counters.

Claims (1)

Invention Formula A device for simulating queuing systems containing a random failure pulse generator, a group of OR elements, a group of service simulation channels, and in each channel a random time delay block, a random pulse flow generator, a reversible counter, a comparison block, a pulse generator, a wok counter , the counter of the serviced stock, the counter of the unattended stock, the trigger, three elements OR, the three elements AND, the first element of the prohibition, and in the Kth measuring channel (, M) - the second element of the ban, and The random failure pulse generator is connected to the arming prohibitions of the pulse generator and random time delay blocks, the first inputs of the first OR elements and the first inputs of the second OR elements of the service simulation channels, and in each of the service simulation channels the output of the random pulse generator is connected with the counting input of the counter quotation, with the first input of the first element I and with the information input of the first element of the prohibition, the output of which is connected to the summing input of the reverse vnogo counter The discharge outlets are connected respectively to the inputs the third element SH and the inputs of the second element AND, the output of which is connected to the second input of the first element OR, the output of which is connected to the control input of the first element prohibition and with the second input of the first element I, the output of which is connected to the counting input of the counter of unserved applications, the output of the pulse generator is connected to the input of the start of the block a random time delay and with a single trigger input, the zero input of which is connected to the output of the second SHS element, and the zero output to the first input of the third And element whose output is connected to the trigger input of the pulse generator, the output of the random time delay block is connected to the counting input of the served counter for the subtracting input of the reversible rut and the second input of the second element SH, the output of the third element OR of the first service simulation channel is connected to the second input of the third element AND, in each K-th channel of the service simulation, the output of the third element OR is connected to the information input of the second prohibition element, the output of which is connected with the second input of the third element AND, the output of the third element OR of the first service modeling channel is connected to the prohibitance input of the random time delay block and with the control input of the second prohibition element of the second measurement channel of the service simulation and with the first input of the first element of the group W, the second element OR of the P-th service modeling channel (M-1) is connected to the second input of the (P-1) -th element A group with a connection that is connected to the prohibition input of the random block, time delay and the control input of the second prohibition element, (P + 1) th service simulation channel and the first input of the P th element of the group 13, is distinguished by e111 so that, in order to expand the functionality of the device by determining the residence time of the quota in the system, it additionally contains a clock generator, and each service simulation channel additionally contains a search block, a switch, a queuing unit, a timer and an adder, the search block contains two flip-flops, two elements And and a ring shift register, the unit output of the first trigger of the search block is connected to the first input of the first element And and the first input of the second element And bl The search window, the output of which is connected to the left shift input of the ring shift register, the output of the first element And the search block, is connected to the single input of the second trigger, the search block, the zero output of which is connected to the zero input of the first trigger of the search block, the queue generation unit contains N queue cells, each of which consists of three flip-flops, two AND elements and a prohibition element, the unit output of the first trigger in each cell of the queue is connected with the first input of the first element And the queue shaping unit, the cat code connected to the single input of the second trigger of the queue shaping unit, the output of which is connected to the information input of the inhibit element of the queue shaping unit and the zero input of the first trigger of the queue shaping unit; the output of the inhibit element is connected to the single input of the third trigger of the queue shaping unit whose zero input is connected to the output VTO.ORGO element AND the block forming the queue, the unit and zero outputs of the third. Trigger block forming the queue are connected respectively to the zero input one second trigger and the second input of the first element And the block forming the queue, the single output of the second trigger of the i-th cell of the queue (i-1, N-1) is connected to the single input of the first trigger and the control input of the prohibition element (1 + 1) -and queue cells and a single output 083812 The second trigger of the Nth cell of the queue is connected to the single input of the first trigger and the control input of the prohibition element of the first cell of the queue; in each service simulation channel, the output of the pulse generator is connected to the single input of the first trigger and the shift input to the right of the ring shift register 0 of the search block, the second input of the first element And of which is connected to the single output of the trigger of its serving simulation channel, and the second inputs of the second elements AND and 5 zero inputs of the second triggers of the search block of all service simulation channels are combined and connected to the output of the random failure pulse generator, in each channel of the service separation simulator, the bit outputs of the search shift ring register are connected respectively to the first inputs of the second elements of all the queues of the forma-5 block queue queues and information inputs of the first group of the switch, the first and second outputs of which are connected respectively to the resolution input of the aggregator and the input do 0 assignments of the timer operation, the first and second groups of information outputs of which are connected respectively to the information inputs of the adder and information inputs of the second group 5 of the switch, the first control input of which is connected to the output of the random time delay block and the second input of the second element AND all the queue blocks of the queue block, the third 0 inputs of the first elements AND of all cells: the queue generator queues are combined and connected to the output of the first prohibition element of their service modeling channel, the single outputs of the third triggers of the queue cells of the formation module queue are connected respectively to the timer installation inputs, the clock output of which is connected to the second 0 to the control input of the switch, and the synchronization inputs of the timers of all service simulation channels are connected to the output of the device clock generator. FIG. 2 FIG. 3 fig L Fi8.5 Editor N. Gorvat ig.8 Compiled by V. Fukalov Tehred L. Olejns Proofreader M. Pojo Order 1893/46 Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35 Raushsk nab, 4/5 Production and printing company, Uzhgorod, st. Project, 4 Fie.6