SU1275460A1 - Device for simulating the queueing systems - Google Patents

Abstract

The invention relates to the field of computer technology and can be used in the study of queuing systems. The purpose of the invention is to expand the functionality of the device by including backup channels in accordance with the established condition and the probability distribution of the applications between the main and backup channels. The goal is achieved by introducing into the device two memory registers, two comparison circuits, a decoder, a trigger, three AND elements and a prohibition element with corresponding functional connections. 1 il.

Description

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05 The invention relates to computing and can be used in the study of queuing systems. The purpose of the invention is to expand the functionality by including backup channels in accordance with the established condition and the probability distribution of applications between the main and backup channels. The drawing shows a diagram of the device. The device contains a generator of 1 random pulses, a counter of 2 incoming orders, a counter of 3 unserved servants, a reversible counter of 4 occupied backup channels, a reversible counter of 5 busy primary channels, the first 6, fifth 5, second 8, fourth 9, third 10 elements And, the first and, the fourth 12 ,. the second 13 and third 1A prohibition elements, the first 15 and second 16 multi-input elements AND, the second 17, the first 18 and third 19 OR elements, the decoder 20, the second 21 and the first 22 random time delay blocks, the probability-distribution block 23, the first 24 and second 25 comparison circuits, the first 26 and second 27 registers. The device works as follows. When at least one backup channel is free in the system and the number of channels occupied is less than K / the signals at the outputs of the multi-input elements 15 and 16 are missing, and the output of the trigger 28 is low. In this case, AND 6-10 are closed, and prohibition elements 1.1-14 are open, and the pulses from the generator 1 of random pulses through the open elements 11 12 of the prohibition and the element OR 17 arrive at the summing input of the reversing counter 5 of the occupied main channels and at the same time - to the input of a random time delay unit 22 simulating the service process. Posting a pulse to the summing input of the counter 5, the number of occupied main pools, increases its code by one, which means that the one main channel is put into operation. The impulse that occurred at the output of block 22 after a time equal to a random service duration, goes to the subtractive input of counter 5 and writes off 602 units, thereby simulating the release of one main channel. At the point in time when the number of occupied main channels reaches the value K, the first comparison circuit 24 produces a signal that translates the trigger 28 into a single state (high level). At that, the element AND 7 opens, and the element 12 closes and the pulses from the generator 1 of random pulses through the open prohibition elements 11 and AND 7 enter the probability-distribution unit 23, which with probability P generates pulses at the first output and with probability ( 1-P) - according to the second. The impulse generated with probability P on the first output goes through the element OR 18 and the open element 14 to the summing input of the counter 4 occupied backup channels and at the same time to the block 21 simulating the service process. The arrival of a pulse to the summing input of the counter of 4 occupied backup channels increases its code by one, which means that one backup channel is occupied. An impulse that occurred at the output of block 20 over a time equal to a random duration of service enters the subtractive input of the counter 4 occupied backup channels and deducts one from it, which means the release of one backup channel. With probability (1-P), a pulse is generated by a probability-distribution unit 23 on the second output and fed through the open interdiction element 13 and the elements OR 19 and 17 to the summing input of the counter 5 occupied main channels and to the input of the block 22. At the moment of time When the number of occupied main channels is reduced to 1 K to the value of K, the comparison circuit 25 generates a signal that triggers the trigger 28 to a zero state. In this case, the element AND 7 is closed, and the prohibition element 12 is opened and the pulses from the generator 1 of random pulses are again fed to the summing input of the counter 5 occupied main channels and the block 22 of random time delays. At the moment when all the backup channels are occupied and at least one main channel is free, signals from the output of the multi-input element I 15,

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connected to the discharge counter of the 4 occupied reserve channels, will close the prohibition element 14 and open the element 10. In this case, the pulses from the probability-distribution unit 23 generated with the probability P on the first output through the element 18, open the element AND 0 and the elements OR 19 and 17 are fed to the summing input of the counter 5 occupied main channels and the random time delay unit 22 simulating the service process.

At the moment of time when you are all done. the channels, both primary and backup, the signals from the outputs of the multi-input elements And 15 and 16 through the open element And 9 will open the element And 6 and close the element II of the ban. In this case, the pulses from the generator 1 through the open element And 9 arrive at the counter 3.

The static performance characteristics of the queuing system modeled by this device are calculated by known methods based on meter readings.

Claims (1)

Invention Formula A device for simulating queuing systems, containing a random pulse generator, the output of which is connected to the input of the incoming order counter, the first input of the first element And the information input of the first prohibition element, the second and third elements And, two multi-input elements And, the second and third prohibition elements, two random time delay blocks, a reversible counter of the occupied main channels, a reversible counter of the occupied backup channels, two OR elements, a counter of unused bids, whose input is from It is connected with the output of the first element AND, a probability-distribution unit, the first output of which is connected to the first input of the first element OR, the second input of which is sub-to the output of the second element AND, the first input of which and the information input of the second prohibition element are combined and connected to the second the output of the probability distribution block, the output of the first multiple-input element AND is connected with the first input of the third element AND and control 754604 The third input of the prohibition element, the discharge outputs of the reversible counter of occupied reserve channels are connected respectively to the inputs J of the first multiple input element And, the output of the first random time delay block is connected to the subtracting input of the reverse counter of the occupied main channels, whose discharge outputs 10 are connected respectively to the inputs of the second multi-input element And, the output of which is connected to the control input of the second prohibition terminal and the second input of the second zelT5 ment And, characterized by By the fact that, in order to expand the functional possibilities by simulating the inclusion of backup channels in accordance with the established condition and the probability distribution of the bids between the main and backup channels, it additionally contains two memory registers, two comparison circuits, a decoder, a trigger, a third 25 OR element, fourth and fifth AND elements, fourth prohibition element, with the outputs of the first and second AND multi-input elements connected respectively to the first and second inputs 30 of the fourth AND element, the output of which is connected to the second input of the first AND element and the control input of the first element ban, the output of which is connected to the information input - the fourth element of the prohibition and the first input of the fifth element And, the output of the fifth element And connected to the input of the rotational distribution flea, and the second input of the fifth element And 0, the control input of the fourth prohibition element is connected to the trigger output, the first and second inputs of which are connected respectively to the outputs of the first and second comparison circuits, the first 5. the inputs of which are connected respectively to the outputs of the first and second registers, and the second inputs of the comparison circuits are combined and connected to the output of the decoder, the inputs of which are connected respectively to the outputs of the reversible counter of the occupied main channels, the summing input of which is connected to the input of the first random time delay block and the output of the second OR element, the first input of which is connected to the output of the fourth prohibition element, and the second input of the third OR element, the first and second inputs of which are connected respectively, to the outputs of the second prohibition element and the third element, AND, the second input of the third element, AND is connected to the output of the first element OR and the information input of the third prohibition element, the output of which is connected to the summing input of the reversing counter of the occupied backup channels and the input of the second block of the random time delay The output of which is connected to the subtractive input of the reverse counter of occupied reserve channels.