SU1536412A2 - Device for recognition of images - Google Patents

Abstract

The invention relates to automation and computing and can be used to monitor and diagnose mechanisms. The purpose of the invention, which is to improve the accuracy of the device, is achieved by introducing a fourth counter, which allows multiple measurements of the parameters of the diagnosed mechanism in one cycle of its operation. 2 Il.

Description

The invention relates to automation and computing and can be used to diagnose mechanisms.

The purpose of the invention is to increase the reliability of recognition.

FIG. I shows the scheme of the device; in fig. 2 is a control block diagram.

The device (Fig. 1) contains signal sensors 1, amplifiers 2, analog switch 3, first filter 4, detector 5, second filter 6, analog-to-digital converter (ADC) 7, differentiating element 8, first key 9, first source 1C, the reference voltage, the first comparator 11, the second voltage source 12, the trigger 13, the driver 14, the OR element 15, the first memory block 16, the control block 17, the second memory 18, the decoder 19, the first 20, the second 21 and the third 22 counters, the third memory block 23, the first delay line 24, the adder 25, the subtractor 26, the second key 27, a block of 28 OR elements, a fourth counter 29, an inverter 30, a second comparator 31, indicators 32, an OR-NOT 33 element, a persistent storage 34, a second delay line 35.

The control unit 1 7. (FIG. 2) contains the first 36 and second 37 triggers, the first 38, the second 39 and the third 40 And elements, the first 41 and second 42 OR elements, the dual toggle switch 43 and the generator 44. The toggle switch 43 is shown in the Training position .

The device works as follows.

In the learning mode of recognizing objects, such as precision tape-moving or similar mechanisms with moving nodes, sensors are attached to the recognition object. Sensors may be of various designs, responsive to mechanical stimuli, acceleration, displacement or

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The learning process begins with a pulse. Start at the first input of the device. On this signal, the first, second, and third counters are set in O and the triggers 36 and 37 of the control unit 1 7 are set to state I. In addition, on the leading edge of this pulse, the shaper 14 forms a pulse, according to which the ADC 7 and the trigger 13 are prepared for operation. At the time of the pulse from the output of the former 14, the first switch 9 transmits to its output the first reference voltage, which is assumed to be obviously larger than the second reference voltage. The first comparator 11 in this case has zero potential at its output. Upon expiration of the pulse from the output of the former 14, the first key switches the voltage to the output from the output of the differentiating element 8. After receiving the signal at the output of the second filter 6, the steady-state voltage at the output of the differentiating element becomes less than the second reference voltage. Due to this, the trigger 13 is set to one state by a positive front from the output of the first comparator 11 and triggers the ADC 7 by the leading edge of its output signal. The need to determine the instant of a steady signal at the output of the second filter 6 is caused by the presence of transients in the measured signal when switching signals from sensors 1 using switch 3 and switching individual bands of the first filter 4. Three signals from sensor 1 along the X, Y and Z coordinates are amplified the amplifier 2 and is fed to the analog switch 3, which passes to its output only one of the input signals, depending on the state of the counter 20, decoded by the decoder 19. This signal goes to the first f filter 4, made in the form of a controlled filter bank. The amplitude-frequency characteristic of this filter is adjustable and passes only a certain part of the spectrum of the input signal, depending on the code at the output of the counter 21. The envelope of detector 5 and o

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filter filters are not dense frequency on the second filter b, made in the form of a low-pass filter. The voltage from the output of the second filter 6 is fed to the ADC 7, where it converts to a digital code on the leading edge of the signal from the output of the trigger 13. But the conversion of the ADC 7 forms a positive front at the service output, which through the third information input of the control unit 17 and open element 40 on the first input of the toggle switch 43 passes to the second output of the control block 17. This signal is then fed to the synchronization input of the recording of the second memory block 18. On its leading edge, a digital code is written from the output of the ADC 7 to the corresponding memory cell. The cell address of the memory block 18 is determined by the digital code on the second 21 and fourth 29 counters, the enabling signal at one of the outputs of the decoder 19, and the code at the output of the block 28 of the OR elements. The code at the output of block 28 repeats the code at. the output of the second key 27 opened by the enable signal from the fourth output of the control unit 17, and therefore the code set manually on the first group of device inputs, goes to the third group of address inputs of the second memory block 18. When teaching a device to various images of an object, sensors are installed in the corresponding object, and the image code is installed on the first group of device inputs. On the leading edge, the signal of the end of the converter from the service output of the A / D converter 7 passes through the AND 39 element opened by the resolving potential of the trigger 37 and through the OR 42 element of the G / control unit to the counting input of the first counter 20, switching it to the next state. Accordingly, the position of the resolving potential at the output of the decoder 19 changes, which connects the signal from another sensor to the output of switch 3. In addition, also on the leading edge of the signal from the service output of the ADC 7, the driver 14 generates a pulse whose duration is equal to the time of recording information to the second block 18 memory On the falling edge of this pulse, the ADC 7 and trigger 13 are reset and prepared for the next survey.

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When polling all sensors in one frequency range, an overflow pulse from the output of the first counter 20 switches the second counter 21 to the next state. Thus, all sensors are polled for all frequency ranges. Their readings are digitally stored in a second memory block 18. When polling the last sensor by the last frequency gtr-band, the overflow pulse from the output of the second counter 2 arrives at step one of the fourth counter 29 and switches it to the next state. When this happens, the survey repeats all sensors in all frequency ranges. The number of repetitions is determined by the recalculation coefficient of the fourth counter 29 and the time of transient processes in the object being diagnosed. At the end of the polling, the overflow pulse from the output of the fourth counter 29 goes to the second input of the control unit 17, where it sets the triggers 36 and 37 to the initial state, thereby removing the work permit (memory blocks. After that, the image of the object under study changes. The learning process is repeated by applying the pulse to the first input of the device.

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In the mode of pattern recognition of the object under study, the toggle switch 43 of the control unit 17 is switched to the Recognition mode. In this case, the second key 27 is closed, prohibiting the external installation of the image number of the object under study, and the element 40, prohibiting the supply of write synchronization pulses to the second memory block 18. Besides,

the recognition process will end only

after interviewing all the memory cells of all

The images of the object under investigation are stored in the second memory block 18, for which the overflow pulse from the output of the second counter 21 is fed to the counter of the fourth counter 29 by switching the toggle switch 43. In the 31st case, the trigger 36 is reset by the fourth overflow pulse 29. The recognition process also begins with the installation of sensors I in a test object to be monitored. When a pulse is applied, the Start to the first nxo; i device starts

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The process of polling sensors is similar to the process of polling in the Training mode. However, the digital data of the object under investigation is recorded in the first memory block 16. With a certain number of polls of all sensors in all frequency bands, the overflow pulse from the third counter 22 sets the trigger 37 to the initial state. In this case, the device switches to the mode of comparing the received data with the data stored in the second memory block 18. At the same time, the permitting potentials arriving at the AND 38 element open it and enable the operation of the generator 44. In addition, the permitting potential from the first output of the control unit I7 puts the first 16 and second 18 memory blocks into read mode. The pulses from the generator 44, entering the first counter 30 and further on the second 21, third 22 and fourth 29 counters, interrogate the memory cells of the memory blocks 16 and 18. In this case, the information read from the memory cells of the same name of the first memory block 16, in which there is information about the object under study, and the second memory block 18, in which data on this object are stored with appropriate data, is fed to individual subtractor inputs 26. The difference between them in absolute value is applied to the information input. adder 25, to the counting input of which a pulse from generator 44 is applied with a certain delay on delay line 35, summed up the information stored in adder 25 with a digital code from the output of the calculator. When comparing all the memory cells of the first memory block 16 with the cells of a separate image of the memory block 18, there is a number on the adder indicating the degree of divergence of the object under study with the compared image. This number is compared with the number stored in ROM 34 at the second digital comparator 31. If it is less than this number, a decision is made about the coincidence of the object under study with this image, a logical unit will appear at its output. Otherwise, this does not happen. The overflow pulse from the third counter 22 arrives at the reception input of the third memory block 23, writing to it at the address determined by the code on the fourth counter 29, a logical signal

from the output of the second comparator 31. An overflow pulse from the output of the fourth counter 29 through the delay line 24 is fed to the zeroing input of the adder 25. This pulse also flows through the closed contacts of the toggle switch 43 to the fifth output of the control unit 17 and then to the counting input of the fourth counter, switching it in the next state. The process of comparing the data of the first memory block B with the other memory sensors of the memory block 18 continues. Upon completion of the data comparison process, the overflow pulse from the third counter 22 through the OR element 41 sets the trigger 36 of the control unit 17 to the initial state, stopping the operation of the entire device. In this case, one of the indicators 32 shows the corresponding indication of the object. If none of the images pre-recorded in memory block 18 coincides with the image of the object under study, the logical unit appears at the output of the OR-NOT 33 element, including one of the indicators 32, denoting the unidentified

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Claims (1)

once the object, which will then need to be analyzed and, if necessary, write its data into separate cells of memory block 18. To eliminate the indication of the last situation in the process of comparing data, the element OR-NE 33 is closed by a logical unit from the seventh output of the control unit 17. When the next start signal is applied, the third memory block 23 is zeroed on the leading edge of the signal from the seventh output of the control block 17. Invention Formula A device for pattern recognition by auth. No. 1361589, characterized in that, in order to improve the accuracy of the device, the overflow output of the second counter is connected to the second input of the control unit via the fourth counter, the Reset input of which is connected to the Reset device input, the information output of the fourth counter is connected to the third address input of the first and second blocks memory FIG. I