SU936417A1 - Device for measuring and registering maximum forces at testing materials - Google Patents

Description

393

cave gap, etc. Significant errors in measurements with this (transducer may occur when the signal under investigation disappears at the time of the sample being destroyed.

The purpose of the invention is to reduce the error and increase the reliability of measurements.

The goal is achieved by the fact that a sensor of the moment of destruction of the test specimen, a multi-input element, and a sensor are introduced into a device for measuring and recording maximum forces during testing of materials containing a serially connected force sensor and an analog-to-digital converter, as well as an electronic device and a digitizer. - NOT, one element NOT and a two-input NAND element for each digit of the digital code connected in series, and the element input is NOT connected to the output of the corresponding analog channel digital input converter, the output of the two-input element AND-NOT is connected to the corresponding input of the multi-input element AND-NOT, the output of which is connected to the input of the counter, the outputs of which are connected to the corresponding corresponding control inputs of the two-input element AND-NOT of each digit and the inputs of the digital printing device, The lower input of which is connected to the output of the sensor of the moment of destruction of the test sample, and VB1IND, the end of measurement of the analog-to-digital converter is connected to the auxiliary input of the my-input elec- ment and NOT.

FIG. 1 shows a block diagram of the device; in fig. 2 is a graph showing the operation of the device.

The device consists of a force sensor 1, an analog-digital converter (ADC) 2, which converts the knowledge-signal into a digital parallel code AND the output AND (a pulse signal the end of the measurement at the end of each measurement cycle, the elements NOT 3 two-input elements AND-NOT k, the multi-input element AND -NON-5, estimator 6-with the output of the counting result in the parallel code, sensor 7 of the moment of destruction of the test sample and digital printing device (CPU) 8. For each code bit there is one element NOT and one two-input element NAND.

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In the initial state (with power on), when the force on the test sample, the analog signal at the input and the digital signal at the output of the LCP are zero, and the counter is reset to zero, the inputs of elements 3 are affected by LCP, the level of which corresponds to logical O, and at their outputs, and, therefore, at the first (according to the diagram of Fig. 1 above) inputs of two-input elements k signals, the level of which corresponds to logical 1. On the second (according to the scheme of FIG. 1 down) inputs of elements k, the signals from counter 5 correspond to logical O .So, on exit all elements are signals whose level corresponds to logic 1. When no measurement end signal output from the ADC, which corresponds to a logic O signal at the first input element of the top

5, and the presence of logical 1 at all other inputs of element 5 at its output will also be logical 1.

When a signal arrives from an ADC, the end of the measurement at the output of element 5n is a signal whose level corresponds to a logical zero. As a result, the first counting impulse corresponding to the unit of the code bit is fed to the counter 6 and recorded. The latter leads to the fact that both inputs of element A (according to the scheme of FIG. 1 of the first one below) receive signals corresponding to logical 1, and at its output a logical OB. Therefore, the output of the multi-input element 5 again sets a signal corresponds to logical 1. Starting from this moment, the device is prepared for measuring the signal under study.

Claims (2)

The process of measuring the signal under study and its maximum value is explained by the diagram (Fig. 1) and the graph shown in Fig. 2, where as a function of time t are given: x (t) is the value of the signal under study in analog form at the input of the ADC; - the value of this signal in digital form at the output of the ADC; value of the same signal in numerical form at the output of the counter. Moreover, the values of xft and take the awisokite values, the coat units of the lower order, the digital code used in the device. 5 In order to clarify the principle of operation of the device, the time reference of the device is taken to measure the signal under investigation, i.e. the moment when x (t) is 0, and the value is the unit of the least significant bit of the code. When the signal under investigation reaches a value corresponding to the unit of the lowest bit of the code at the output of the ADC 2 (time t in Fig. 2), S i on L, C 9 corresponding to logical 1 from LCP is inverted by element 3 (according to the scheme of Fig. 1 lower) logical Oh arrives at the first input of the element A (according to the scheme of FIG. 1 lower). At the second input of this element, the signal from the counter corresponds to logical 1. Consequently, the output of this element is a signal corresponding to logical 1. Then, at the moment when f is running from the ADC pulse, the end of measurements on all inputs of element 5 is affected by signals corresponding to logical 1, and the output of logical O. As a result, the counter 6 records a second counting pulse, which changes the state of the second input of element 4 (according to the diagram of Fig. 1 second from the bottom) from logical O to logical 1, and at the output of this element pos The Cs signal is logical O. At the output of element 5, a signal is set corresponding to logical 1. When the signal under test reaches a value corresponding to two low-order code bits at the output of the ADC (time tg in FIG. 2), the process is repeated in counter 6 the number 3 is written. And so on, i.e. during each cycle of changing the number at the output of the ADC by a unit of the least significant bit (upwards), an additional one counting pulse is recorded in the counter, and the total value of the number in the counter exceeds the value of the number at the output of the ADC by one unit of the least significant code. With the destruction of the test sample (time t in Fig. 2), the signals x (t) disappear and the value recorded in the counter remains, is taken as the maximum value of the signal under investigation and is detected by the digitizing device 8 at the trigger signal "sensor 7". After printing is completed, device 8 issues a Reset signal to set the counter to the zero position, and the entire device to its original state. The maximum absolute error of measurement of the amplitude of the signal under investigation when using the proposed device does not exceed plus 1 low-order code used in the device. Apparatus of the Invention A device for measuring and recording maximum forces during testing of materials, comprising a series-connected force sensor and. An analog-to-digital converter, as well as a counter and a digital printing device, characterized in that, in order to reduce errors and increase measurement reliability, a sensor for the moment of destruction of the tested sample, a multi-input element AND-NOT, one element NOT and a two-input element AND, are introduced into it NOT for each digit of the digital code connected in series, and the input of the element is NOT connected to the output of the corresponding bit of the analog-digital converter, the output of the two-input element of the NAND is connected to the corresponding named by the input of the multi-input NAND element whose output is connected to the input of the counter, the outputs of which are connected to the corresponding control inputs of the two input element AND - NOT of each bit and the inputs of the digital printing device, the control input of which is connected to the output of the sensor of the moment of destruction of the test sample , and the output The end of measurements of the analog-digital converter is connected to the additional input of the multi-input element AND-NOT. Sources of information taken into account in the examination 1. K. Netrebenko. Compensation schemes of amplitude voltmeters of the extremum indicators, 19b7, p. . 2. USSR author's certificate 25639, cl. H 03 K 13/02, 19b7, (prototype). t, i 2 P