SU1527715A1 - Code converter - Google Patents

Abstract

The invention relates to computing and can be used to build signed binary code converters into a multi-valued code. The aim of the invention is the extension of the class of tasks to be accomplished by ensuring the conversion of a binary code into a digit-significant code. The goal is achieved by the fact that the trigger converter 1 containing the pulse distributor 1, the shift register 2, the output converter 14 is additionally introduced with a trigger 13, and the output converter is made of the element HE 3, elements AND 4, 5, elements OR 6, 7. 2 silt

Description

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The invention relates to computing and can be used to build a signed binary code converter into a multi-digit code.

The aim of the invention is to expand the class of tasks to be accomplished by providing conversion of a binary code to a signed bit code.

PA figure 1 presents the scheme of the proposed Converter; Fig 2 shows a temporary diagram of his work.

The converter contains a pulse distributor 1, a shift register 2, a NOT 3 element, AND 4 and 5 elements, an NLI 6 and 7 elements, a negative 8 and a positive 9 number of a converter, the information input 10 of a converter, an input 11 of a converter, a push input 12 transducer and trigger 13. The combination of elements 3 through 7 with the appropriate connections is output transducer 14.

The Converter operates as follows.

By the recording gate, which is fed to the input 11 of the record, the input code of the number is entered into the converter via the information input 10, and the sign-. the second bit falls into the trigger 13, and the rest is entered into the shift register 2 so that its highest output is the highest bit of the number. The pulse distributor 1 is reset. The impulse from the first output of the distributor 1 impulses goes through the elements OR 6 and 7 to the outputs of positive 9 and negative 8 numbers of the transducer, forming a mar-i ker ,. by which the beginning of a consecutive digit number is determined. The trigger output signal 13, equivalent to the sign bit of the input code, connects the output of the shift register 2 to the outputs of negative 8 or positive 9 numbers of the converter, respectively, through pairs of elements 4, 6 and 5, 7.

In each subsequent cycle, under the action of the pulses, from the second output of the distributor 1 of pulses, the code shifts in the shift register 2 by one bit towards the higher bits.

The next bits of the sequential code from the output of the shift register 2 arrive at the output selected in the first cycle. The second output remains disabled until the next number is entered at the information input of the converter.

Claims (1)

Invention Formula A code converter containing a shift register, a pulse distributor and an output converter, the information input of which is connected to the output of the shift register, and a clock input of the output converter is connected to the first output of the pulse distributor, the second output of which is connected to the clock input of the shift register, the information input of which is connected to the information the input of the converter, the recording input of which is connected to the recording input of the shift register and the start input of the pulse distributor, cycles The second input is connected to the clock input of the converter, the outputs of which are connected to the outputs of the output converter, characterized in that, in order to expand the class of tasks to be solved by providing a coding code into the sign, the sign trigger is inserted in it, and the output converter contains the first and the second element OR, the first and second elements AND and the element NOT, the output of which is connected to the first input of the first element AND, and the input of the element is NOT connected to the trigger output and the first input of the second element AND, the second input cat connected to the second input of the first element AND, and is the information input of the output converter, the clock input of which is connected to the first inputs of the first and second OR elements, the second inputs of which are respectively connected to the outputs of the first and second elements AND, the outputs of the first and second elements OR are respectively, the outputs of positive and negative numbers of the converter, the information input of which is connected to the information input of the trigger, the synchronous input of which is connected to the input of the conversion record ate. Compiled by M.Arshavsky Editor O.Yurkovetskaya Tehred L.Oliynyk Proofreader M.Maksimishinets Order 7518/57 Circulation 884 VNIIPI State Committee for Inventions and Discoveries of the State Committee for Science and Technology of the USSR 113035, Moscow, Zh-35, 4/5 Raushsk nab.     -P- | - | SchtCt DH. - --- - - Production and Publishing Combine Patent, Uzhgorod, st. Gagarin, 101 Signature