SU1216803A1 - Device for correcting skewness of multitrack magnetic record - Google Patents

Abstract

The invention relates to magnetic recording. The purpose of the invention is to increase the speed by increasing the bit depth of the device by using reproducible markers. For this, a pulse counter 13 is connected via a control unit 14 with a bus 10 and with a trigger (D) 16 with a separate start, guided to the output of an element 15, connected by inputs to interconnected outputs of elements 18 and 19 and the first inputs of fourth keys (K) 11 , the second inputs to the output T 16 and the outputs to interconnected second inputs of the third K 8 respective groups 1 and 2 of registers 3, the first element And 18 being connected by each input to the second input of one of the second K 7 and the inverse output of one of T 6 corresponding bits, Torah AND gate 19 is connected to a direct output of one of T 6 and 7. To the input 1-yl. a 00 about with 15

Description

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The invention relates to magnetic recording, in particular, to devices for correcting the skew of a multi-track magnetic recording.

The purpose of the invention is to increase the speed when decreasing the size of the device by using reproducible marking signals.

The drawing shows a functional diagram of the device for correcting the skew of a multi-track magnetic recording.

The device contains two groups 1 and 2 of registers 3, the number of which is equal to the number of bits connected by information inputs to the first keys 4, connected by the first inputs between themselves and with the i-information 5 and second inputs - with inverse and direct trigger outputs 6, respectively, second 7 and third keys 8 connected by outputs to synchronization inputs of registers 3 of corresponding groups 1 and 2, synchronization buses 9 connected to the first inputs of corresponding second keys 7, control axis 10 connected to connected between each of the first inputs of 1 third of the 8th, fourth 11th and fifth 12 keys, 13 impulse counter, key element 14, element OR 15, trigger 16 with separate start, output tires 17, as well as the first 18 and second 19 elements I. Other than Moreover, in a device for correcting the skew of a multi-track magnetic recording, a pulse counter 13 is connected by an input through a key element 14 to a control bus 10 and to a trigger start 16 with separate start connected by a first input to an output of a pulse counter 13 and a second input to an output 3Xfei-ieHTa OR 15 connected in By connecting to the outputs of the elements 18 and 19 and the first inputs of the fourth AND keys, the second inputs 1 and the trigger 16, which are attached to the output of the trigger with separate start and the outputs, the second inputs of the third key groups of 8 corresponding registers of groups 1 and 2 of registers 3 are interconnected , the first element And 18 is connected by each input to the coefficients unchanged between itself to the second input of one of the second keys 7 and the inverse output of one of the triggers b sooTvet168032

-1x bits, the second element And 19 is connected by each input to the interconnected directly to the output of one of the triggers 6 and the second:) to the input of one of the second keys 7 of the second group 2 registers 3 corresponding to the bits, the fifth keys 12 are connected by outputs to the output 01 of 17, the first inputs 10 to the outputs of the first and second elements: - - this is And 18 and 19, respectively, of the first and second groups 1 and 2 of registers 3, connected by an output of the intermediate bit with the second input fifth key 12 and the output of the last bit - with one m of the inputs of one of the trigger 6, respectively for the first, br, 2 and the second group of registers 3.

20 The device works as follows.

In the initial state, the triggers 6 are in the zero position. All registers 3 are set to zero,

25 At the beginning of reading from the magpit carrier, the registers 3 of the first group of registers 3 are first filled with information.

The first read control

Line 30 (in all digits of which is one; and, after it, all information lines of the microarray.

The clock from registers 3 fills 1- with itself using synchronizing pulses from its sync bus 9c,

In the time of the receipt of the unit of control the last discharge

jQ register 3 flip-flop 6 is set to one. In this case, the flow of information into the register 3 of the first group 1 of registers 3 stops and the flow of information of the CEC to the register 3 of the same category of the second group 2 of registers 3 begins

As information is being filled with registers 3 of the first group 1 of registers 3, the analogue is alternately switched to

Q reception of information remaining registers 3 second group of registers 3,

At the moment of complete filling of the last register 3 of the first group 1 of registers 3, a corresponding potential is formed at the output of the first element And 18, which sets the trigger 16 with a separate start to the one position, which allows the arrival of pulses from the bus 10 of the counter 13 pulses.

The signal from the output of one of the fourth to / villa 11, arriving at the second inputs of the third keys 8 allows the transmission of pulses from the control bus 10 to the synchronization emaciated inputs of registers 3, which ensures the output from this group 1 of registers 3 to the output tires 17.

After counting a predetermined number of pulses from the control bus 10, the signal generated at the output of the pulse counter 1 resets it to the initial position and sets the trigger 16 to the zero position.

During the output of information from the first group 1 of registers 3, the second group 2 of registers 3 continues to receive information from information buses 5,

After the second group 2 registers 3 are filled with information, an appropriate potential is formed at the output of the second element I 19. Similarly, in the described order, the process of outputting information from the second group 2 of registers 3 occurs.

The use of the invention makes it possible to significantly increase the speed of the device while increasing the size of the device by increasing the number of I / O channels.

Claims (1)

Invention Formula A device for correcting the skew of a multi-track magnetic recording, containing two groups of registers, the number of which is equal to the number of bits connected by information inputs to the outputs of the first keys connected by the first inputs among themselves and to the information buses and the second inputs to the inverse and direct trigger outputs, respectively the second and third keys connected by bb moves to the synchronization inputs of the registers of the corresponding groups. Editor Oh, Golovach Order 1002/59 Circulation 544 Subscription In (1IPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab, 4/5 Phipiap 1SHP Patent, Uzhgorod, Projecto st., 4 ten faith pines ist rmaest10, and 1 in ate perinuct oyazchei ekosi, ov, amy no dream five ten 15 20 25 216803- - sync skinny tires connected to the first 1 and inputs of the corresponding second keys, control bus connected to the first inputs of the third keys connected to each other, quarter and fifth keys, pulse counter, key element, element 1 SHI, trigger with separate start, output tires and the first and second elements And, characterized in that, in order to increase speed by increasing the device's width by using reproducible markers of 1 × 1 signals, the counter of 1 1 pulses is connected to the input via a key element with control with a bus and with a trigger output with separate start, connected by the first input to the output of the pulse counter and a second input to the output of the RSHI element connected by inputs to interconnected outputs of the AND elements and the first inputs of the fourth keys, the second inputs connected to the trigger output with separate by launching and exiting - to the interconnected second inputs of the third keys of the corresponding groups of registers, with the first element AND connected by each input to the interconnected second input of one of the second cells each input and inverse of one of the triggers of the corresponding bits, the second element AND is connected by each input to interconnected direct output of one of the triggers and to the second input of one of the second 1 secondary second group of registers of the corresponding bits, while the fifth keys are connected by outputs to the output ones tires, the first inputs - to the outputs of the first and second elements And, respectively, of the first and second groups of registers connected by the output of the intermediate bit with the second input of the corresponding fifth key and the output after the day bit is from one of the inputs of one of the triggers, respectively, for the first or second group of registers. Preserver V. Dobrovolsky Öhred O. Necr Corrector G. Reshetnik thirty 35 40 45