SU1520557A1 - Nonlinear a-d converter - Google Patents

Abstract

The invention relates to automation, computing and measurement technology. The purpose of the invention is to simplify the converter when reproducing the monotonic functions of limited variation. The non-linear analog-to-digital converter contains a voltage conversion unit in the number of pulses, a synchronization unit 2, a memory unit 3, a result counter 4, two differentiating circuits 5 and 8, an AND-NOT element 6 and an OR element 7. The operation of the converter is based on conversion the input voltage to the number of pulses accumulated by the result counter, to the counting input of which additional pulses can be received, the possibility of accumulation of which is determined by the current state of the output code of the memory block 3. The use of a single-bit memory block with the corresponding formation of additional pulses directly from the output pulses of block 1 allows us to simplify the converter. 2 Il.

Description

one

(21) 4415565 / 24-24

(22) 04/25/88

(46) 07.P.89. Bul S- 41

(71) Lviv Polytechnic Institute. Lenin Komsomol and Lviv Institute of Forestry

(72) Vs. Br.dorf, V.L.Kotlov and A.I. Holosha

(53) 681.335 (088.8)

(56) Copyright svdededelstvu USSR JP 1113812, cl. G 06 G 7/26, 1982.

USSR author's certificate number 1126978, cl. G 06 F 15/353, 1983.

(54) NONLINEAR ANALOG-DIGITAL CONVERTER

(57) The invention relates to automation, computing and measurement technology. The purpose of the invention is to simplify the converter when reproducing the monotonic functions of limited variation. Nonlinear analog-digital | the converter contains voltage conversion unit 1 in the number of pulses, synchronization unit 2, memory block 3, result counter 4, two differentiating circuits 5 and 8, AND-NOT element 6 and element OR 7, the operation of the converter, based on the conversion of the input voltages to the number of pulses accumulated by the result counter, to the counting input of which additional inputs may be received, the possibility of accumulation of which is determined by the current state of the output code of memory block 3. The use of a single-bit memory block with the corresponding formation of additional pulses directly from the output pulses of block I allows simplifying the converter. 2 Il.

after that

about

O1

O1

Kl

Shg / g /

The invention relates to automation, computing and measuring equipment, in particular to functional analog-digital converters,

The aim of the invention is to simplify the converter when reproducing monotonic functions of limited variation.

FIG. I is a block diagram of a non-linear analog-to-digital converter; in fig. 2 are timing diagrams illustrating the process of adding pulses to the counter input,

A non-cervical analog-digital converter contains a voltage-to-pulse-voltage conversion unit 1, a synchronization unit 2, a memory unit 3, a result counter 4, a first differentiating circuit 5, an AND-NE element 6, an OR element 7, and a second differential signal breaking chain 8.

The Converter operates as follows.

-

Each pulse of block 2 starts,; block I and at its output a burst of pulses appears, the number of pulses in the packet is proportional to the input voltage and. All these pulses are received at the input of the result 4 through the differentiating circuit 3 and the element OR 7. In addition, each pulse of block 1 is fed to the input of the element AND NOT 6. If the output of memory block 3 at the time of arrival pulse output from the block. 1 there is a unit, then this pulse goes to the output of the element AND-NOT 6 as a negative pulse, its back front is differentiated by the α-chain 8 and through the element IfflH 7 enters the input of the counter 4,

Thus, for each pulse of unit 1, the input of the counter 4 can be either one (at the output of memory block O) or two (at the output of memory block 1). Pulse.

Claims (1)

When writing to the memory block of zeros at all addresses, the output of counter 4 receives the same number of pulses as from the output of block J. When writing to the memory block of all units, the input of counter 4 receives twice as many pulses as in the previous case, and when writing to the memory block, and the ones and zeros, the result will be obtained between these extreme values and can be programmed according to any law within these limits. At the same time, the initial value of the function is decoupled due to a preliminary non-zero setting of the result counter by applying to the information outputs the pre-setting of the counter 4 zeros and ones. Invention Formula A non-linear analog-to-digital converter containing a voltage-to-pulse number conversion unit whose information input is the converter input, and the start input is connected to the output of the synchronization unit, a memory block, two. differentiating circuits and an OR element connected by an output to the counting input of a result counter, characterized in that, in order to simplify the converter when playing monotonous functions of limited variation, it contains an AND-NOT element connected by a first input to the output of the voltage-transforming unit and the input of the first differentiating circuit, the second input with the output of the memory unit, and the output with the input of the second differentiating circuit, the output of which is connected to the first input of the 1ShI element connected by the second input with Exit the first differentiating circuit, wherein the address input .bloka memory connected to the output of the counter result, the initial setting input coupled to an output synchronization unit. Editor O. Golovach Compiled by S.Kazinov Tehred A. Kravchuk. Order 6761/52 Circulation 668 VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, F-33, 4/5, Raushsk nab. Production and Publishing Combine Patent, Uzhgorod, st. Gagarin, 101 (Rig, g Proofreader M.Samborsk Subscription