SU1510074A1 - Pulse synchronizing device - Google Patents

Abstract

The invention can be used in devices for processing and transmitting digital signals. The purpose of the invention is to simplify the device and expand its functionality. The device contains a trigger 1 and an NOT-2 element. The introduction of the shaper 4 short pulses and the formation of new functional connections allows the formation of short pulses along the fronts of the input and output pulses. 1 il.

Description

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The invention relates to a pulse technique and can be used in devices for processing and transmitting digital signals.

The purpose of the invention is to simplify the device while simultaneously expanding the functionality by forming short pulses along the edges of the input and output pulses.

The drawing shows an electrical functional diagram of a device for synchronizing pulses with

The device contains a trigger 1, the first input (start) of which is connected to the output of the element AND-NOT 2, the first input of which is connected to the input bus 3, the second input through the driver 4 short pulses with pin 5 clock pulses and the second input (reset) trigger 1, the output (inverse) of which is connected to the third input of the element AND-NOT 2.

The device works as follows.

On 1 bus 5, clock pulses are received, on the front of which shaper 4 high level pulses are generated. If a high level arrives at the pin 3 at the moment of forming the mentioned short pulses, a low level is formed at the output of the element 2, which causes the switching of the trigger 1 At the output of the trigger 1 a low level is formed which leads to the appearance of the element 2 .high level with low level

on nDttie 5, trigger 1 returns to its original state, in which a high level is present at its output.

If bus 3 is constantly at a high level, then a continuous sequence of (inverted) clock pulses is generated at the output of the trigger.

Thus, at the output of element 2, pulses are formed corresponding to the front (negative level difference) of output pulses, and at the output of shaper 4 - pulses corresponding to the front (positive level difference) of clock pulses.

Claims (1)

20 claims A device for synchronizing pulses, which contains an NAND element, the first input of which is connected to the input signal bus, the output to the first trigger input, the second input of which is connected to the clock pulse bus, characterized in that, in order to simplify while expanding the functionality ensuring the formation of short pulses along the fronts of the input and output pulses, a short pulse shaper is inputted into it, the input of which is connected to the clock pulse bus, the output is connected to the second input of the NAND element whose third input is connected to the trigger output.