SU1434437A1 - Signature analyzer - Google Patents

Abstract

The invention relates to computing and can be used to control discrete nodes. The aim of the invention is to increase the reliability of control by uniquely identifying the constant states of the information input. The signature analyzer contains an encoder 1, two imagers 2 and 3 signatures, a decoder 4, three triggers 5-7, a majority element 8, a display unit 9, a imager 10 time signals. In order to detect constant faults, the encoder encodes each input signal (0.1 or z) into two bits so that one of the bits or both of them are logical zeroes. In addition, a circuit (consisting of a decoder, three triggers, and a majority element) records a change in the state of the information input of the analyzer. Due to this, unambiguous identification of constant malfunctions of monitored nodes is provided. 1 il. with S (L s: 4; SAE 4 00 h

Description

The invention relates to computing and can be used to control discrete objects.

The aim of the invention is to increase the reliability of control by unambiguously identifying the constant states of the information input.

The drawing shows a structural diagram of the proposed signature analyzer.

The signature analyzer contains the encoder 1, the first driver 2 signatures, the second driver 3 signatures, the decoder 4, the first trigger 5, the second trigger 6, the third trigger 7, the majority element 8, the display unit 9, the imager 10 at the time the output of the decoder 4, in its own The queue causes the next trigger to be set. The output of the major element 8 & The output of the majority element 8 is connected to the display unit 9.

In the case of the input to the analyzer's input 11 a logical constant (“O”) or by encoding information, so that one of the bits or both of them are logical zeroes in the first signals, information input 11, the driver of 2 signatures, or the second control input input 12, sync-input 13 ana-rum driver of 3 signatures, or both

lysator, controlled synchronous input 14 of the analyzer, output 15 of the first bit and output 16 of the second bit of the encoder 1.

Signature analyzer works as follows.

the driver will simultaneously generate a zero signature, which is indicated in the display unit 9. Encode, for example, every bit of the output of a controlled element into two bits of such

The controlled binary vector is fed in the form of the next bit through the input 11 to the encoder 1. The external start-stop signals at the control input 12 are formed with the help of the shaper 10 time-V. .f

signals corresponding to the measurement information.

in the following way:

logical "O - 01

logical "1 - 10

Z - 00 where Z is the third signal state of the diagnostics window (measurement interval), the sine pulse pulses input to input 13 fill the measurement window and are fed to the controlled synchronization input 14 of signatures. We denote the signature formed in the former 2 through Ri ( x), and in formatter 3, - R2 (x). Then Ri (x) 0 and R2 (x) x (x is any sixteen analyzer. Depending on the state, Q is the primary number) corresponds to the presence of “O on no input bit encoder 1 recurrent input 11; Ri (x) x and R2 (x): 0 - “1 per

input 11 and R2 (x) 0 and R2 (x) 0 is the third signal state of the diagnostic information on the input 11 of the analyzer regardless of the length of the measurement window (any

By the signal at input 14, connected to the synchro 35, the number of zeros divided by the generator — the inputs of the formers 2 and 3, which codes the polynomial, is 0). However, there are

non-zero sequences whose polynomials are divided without remainder by the generating polynomial R (x). The uniqueness of the identification of such sequences de-dips every bit of the output of the element under test into two bits so that one of the bits or both of them are logical zeroes. In sync with the synchronized information, it enters the information input of the first driver 2 signatures, connected to the output 15 of the first bit of the encoder, and the information input of the second generator 3 is baked by a circuit consisting of a decoder 4, triggers 5-7 and a major element 8, "lighting the additional . of course, a segment in the display unit 9 in the presence of pulses on the informational dc input 11 of the analyzer.

Thus, the proposed signature analyzer allows unambiguously to identify the levels of logical signals ("1 and z), regardless of the length of the measurement window, which increases its

signatures connected to the output 16 of the second bit of the encoder. The outputs of the driver 2 and 3 are supplied to block 9 to indicate the corresponding signatures at the end of the measurement interval.

To identify the presence of pulses at the information input 11, a decoder 4, triggers 5-7, and majority element 8 are entered. The next pair of bits,

the corresponding state of information and reliability of the control input sent to the decoder 4 causes the occurrence of “1 at one of the outputs of the decoder 4, which in turn causes one of the triggers to be set to one upon receipt of the next sync pulse.

When the status of the information input is changed, the next pair of bits applied to decipher 4 causes the appearance of "1 to

Claims (1)

Invention Formula Signature analyzer containing 55 encoder, two signature generators, time signal generator and display unit, the first and second groups of information inputs of which are connected another output of the decoder 4, which in turn causes the installation of the next trigger. The output of the major element 8 < 1 > appears when there are < 1 > at its two inputs, i.e., when more than one trigger is set, which corresponds to the presence of changes in the information input state. The output of the majority element 8 is connected to the display unit 9. If the analyzer is supplied with a logical constant (“O”) at the input 11 or by encoding information in such a way that one of the bits or both of them are logical zeroes in the first driver of 2 signatures, or in the second driver of 3 signatures, or in both the second driver of the 2 signatures, or in the second driver of the three signatures, or both the driver will simultaneously generate a zero signature, which is indicated in the display unit 9. For example, encode every bit of the output of a controlled element into two bits of such “V. .f in the following way: logical "O - 01 logical "1 - 10 Z - 00 where Z is the third signal state of the diagnostics control, Invention Formula about the reliability of control, Signature analyzer containing 55 encoder, two signature generators, time signal generator and display unit, the first and second groups of information inputs of which are connected with the groups of outputs of the first and second signature drivers, respectively, the start-stop and synchronous input of the analyzer are connected to the corresponding inputs of the time signal generator, the output of which is connected to the synchronous inputs of the first and second signature drivers, whose information inputs are connected respectively to the first and second encoder outputs, the input of which is an information input of the analyzer, characterized in that, in order to increase the reliability, control through the unique identification of constants x states of the information input, the analyzer contains a decoder, three flip-flops and a majority element whose output is connected to the third information input of the display unit, and the first, second and third inputs to the outputs of the corresponding triggers, the snapshot inputs of which are combined and connected to the output of the time signal generator, the first and second inputs of the decoder are connected to the corresponding outputs of the encoder, the first, second and third outputs of the decoder are connected to the information inputs of the corresponding triggers.