SU903898A1 - Signature analyzer - Google Patents

Description

The invention relates to the field of automotive and computer engineering and can be used to control discrete objects.

Known signature analyzer containing an information receiving unit, ^{5 a} shaper of temporary signals, a shaper of signatures · and an indication unit flj.

The disadvantage of this analyzer is the limited reliability of the output information, depending on the length of ¹⁰ output information words.

The closest in technical essence to the proposed one is a signature analyzer containing a time shaper, whose input ^{15 is} connected to the control input of the analyzer, the output is to the first control input of the signature shaper, the output of which is connected to the input of the display unit. ²⁰

A disadvantage of the known analyzer is the limited scope arising from the distortion of the displayed information when monitoring discrete objects having three states of output signals.

Nel inventions - expanding the scope of the analyzer by processing discrete information that has three states.

This goal is achieved by the fact that an encoder, a trigger, a single vibrator, an OR element, and a switch are inserted into the analyzer, the first and second information inputs of which are connected to the corresponding outputs of the encoder, the output - to the information input of the signature generator, the control input - to the trigger output, the installation input to the zero of which is connected to the analyzer clock input, with the input of the one-shot and with the first input of the OR element, the input of which is connected to the single input of the trigger 'and the output of the one-shot, and the output - to the second control in the signature generator, and the information input of the analyzer is connected to the input of the encoder.

The drawing shows a block diagram of the analyzer.

The analyzer contains an encoder 1, j switch 2, a signature shaper 3, an indication unit 4, a time shaper 5, a trigger 6, a one-shot 7 and an OR 8 logic element, an information input 9 and an analyzer clock input 10, an auxiliary clock signal 11, a clock signal 12 on the second the control input of the shaper 3 signatures, the output 13 of the first bit of the encoding encoder, the output 14 of the second 15 bits of the encoder, the control input 15 of the analyzer.

The signature analyzer works as follows.

The controlled binary vector ₂ θ is supplied as the next input bit to input 9 and to the encoder 1 per clock with the main clock signal at input 10. This signal is synchronized with external start / stop signals at input 15, 25, which form the corresponding measuring signal using the output signals of driver 5 window. Depending on the state of the input bit, the encoder 1 transcodes each bit of the ed output of the controlled element into two bits in this way

Logical 1 11

Logical Oh

Z 10 where 7 ~ is the third state of the diagnostic information signal.

The outputs 13 and 14 of the encoder 1 are connected respectively to two information inputs of the switch 2, address. the control input of which is controlled by trigger 6, which is set to zero by the front of the main clock signal from input 10 coming from the outside to the analyzer. Being in the zero state, this trigger addresses the first input of switch 2, to the output 13 of which the signal from the first output of encoder 1 passes. This signal is perceived by the main clock signal 10 at the input ^{50 of} the former 3. Formed with some delay, determined by the double one-shot 7, relative to the cutoff of the main clock signal 10 auxiliary clock signal 11 with its $$ front switches trigger 6 to a single state, so switch 2 switches to its output already signal 14 from the second output of encoder 1. Cut off the whole auxiliary clock signal 11 through the element OR 8, this signal is perceived by the driver 3, the outputs of which are fed to block 4.

Thus, for one period of the main clock signal 10, one bit of the output of the tested logic circuit is encoded into two corresponding bits, the two bits are sequentially multiplexed to the input of the signature generator and, due to the final clock signal, 12 or two shifts in the shift register of the signature generator involved in the formation of the common signatures. In this case, the length of the controlled binary vector is obviously doubled, which is practically of little importance, given the high reliability of the signature analysis. This allows you to eliminate errors in the formation of the signature for information that has three states. Timing relationships and parameters of durations of synchronization pulses, delays between them, etc., are determined by the used elemental base of the equipment and the tested logic circuits and nodes.

Claims (2)

The invention relates to the field of automation and computer technology and can be used to control discrete objects. A signature analyzer is known, which contains an information receiving unit, a time signal generator, a signature generator, and a display unit f. The disadvantage of this analyzer is the limited accuracy of the output information, depending on the length of the displayed infomation words. The closest in technical R of the present invention is a signature analyzer containing a time signal generator, the input of which is connected to the control input of the analyzer, and the output is connected to the first control input of the signature generator, the output of which is connected to the input of the ICC unit 2. The disadvantage of the known analyzer is the limited area that is applied resulting from the distortion of the output information when monitoring discrete objects that have three state signals. The purpose of the invention is to extend the scope of application of the analyzer by processing discrete information, three states. This goal is achieved by the fact that an encoder, a trigger, a one-shot, an OR element and a switch are entered into the analyzer, the first and second information inputs of which are connected to the corresponding outputs of the recorder, the output to the information input of the signature generator, the control input to the trigger output, the input of the set to zero of which is connected to the synchronous input of the analyzer, to the input of the one-shot and to the first input of the element OR, the vt.y input of which is connected to the single input. the trigger and the one-shot output, and the output - to the second control input of the signature generator, with the information input of the analyzer connected to the input of the pulse generator. The drawing shows the block diagram of the analyzer. The analyzer contains encoder 1, switch 2, form; gel 3 signatures, indication unit 4, time signal generator 5, trigger 6, one-shot 7 and logic element OR information input 9 and analyzer synchronous input 1, auxiliary synchronization signal 11, synchronization signal 12 on the second control signal the input of the driver 3 signatures, the output 13 of the first bit of the encoder encoder, the output 14 of the second bit of the encoder, the control input 15 of the analyzer. Signature analyzer works as follows. The monitored binary vector is fed as a next input bit to input 9 and to encoder 1 in so with the main clock signal at input 10. This signal is synchronized with external start / stop signals at input 15, which form the corresponding measurement window with the help of output signals from shaper 5. Depending on the state of the input bit, the encoder 1 recodes each bit of the output of the element being monitored into two bits in the following way. Logical 111 Logical GPR O Z10 where L is the third signal state of the diagnostic information. The outputs 13 and 14 of the encoder 1 are connected respectively to the two information inputs of the switch 2, the dedicated control input which is controlled by the trigger 6, which is set to zero by the front of the main sync signal from the input 10, coming from the outside to the analyzer. Being in the zero state, this trigger addresses the first. the input of switch 2, to the output 13 of which passes the signal from the primary output of the encoder 1. This signal is sensed from the main clock signal 10 at the input of the shaper 3. Formed with a certain delay, determined by the dual one-vibrator 7, relative to the cut of the main clock signal 10, the auxiliary clock signal 11 the front switches the trigger 6 to the unit state, so that the switch 2 commutes to its output signal 14 from the second output of the encoder 1. Cut the auxiliary sync signal 11 through the element OR 8 this signal It is received by shaper 3, the outputs of which are fed to block 4. Thus, during one period of the main clock signal 10, one bit of the output of the tested logic circuit is encoded into two corresponding bits, sequential multiplexing of these two bits to the input of the signature generator and due to the final clock signal 12 two shifts in the shift register of the signature generator involved in the formation of a common signature. In this case, it is obvious that the length of the controlled binary vector doubles, which practically has no special value, taking into account the high reliability of the signature analysis. This eliminates errors in generating signatures for information that has three states. Timing ratios and parameters of synchronization pulse durations, delays between them, etc. are determined by the hardware components used and the logic circuits and nodes under test. Invention The signature analyzer containing a time signal generator, the itOTOporo input is connected to the control input of the analyzer, the output is connected to the first control input of the signature generator, the output of which is connected to the input of the display unit, characterized in that, in order to expand the scope of application by processing discrete information that has three states, an encoder, a trigger, a one-shot, an OR element and a switch, the first and second information inputs of which are connected to the corresponding output the encoder, the output is to the information input of the signature generator, the control input to the trigger output, the input of which is set to zero is connected to the analyzer's synchronous input, to the one-vibrator input and to the first input of the OR element, the second input of which is connected to the single input of the trigger and single-vibration output and the output is to the second control to the input of the signature generator, and 59038986 information input of the analyzer is connected1. UK patent with the input of the encoder. 1 1547574, class With 1 V pub. 1978 Sources of information, 2. US patent No. 3976864, taken into account during examination. 235-153, published. 1974 (prototype). W and - “g