SU1522239A1 - Device for monitoring analog objects - Google Patents

Abstract

The invention relates to automation and computing and can be used to detect faulty elements in analog objects. The purpose of the invention is to expand the scope and simplify the device. The device contains a signal level matching unit 1, voltage dividers 2 and frequencies 23, comparators 3, 4, elements AND 5, 6, 11, 12, 13, NOT 7, OR 17, reversible counter 8, digital-to-analog converter 9, reference source 10 voltage trigger 14, shaper 15 measurement time interval, a group of elements And 16, registers 18, 19 shift, adder 20 modulo two, indicator 21, pulse generators 22 and single pulses 24, switches 25, 26. The device allows you to control objects without built-in stimulators and connected matching devices. 2 Il.

Description

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SP GCHE GO Yu

WITH

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This invention relates to automation and. computer technology and can be used to control analog objects and to search for irregular elements in them.

The purpose of the invention is to simplify the device and expand its scope.

Fig, 1 shows the functional | Q on the device diagram; FIG. 2 is a time chart of his work.

The device contains a signal level matching unit 1, a voltage divider 2, first 3 and second 4 comparators, first 5 and second 6 AND elements, NOT 7 element, reversible counter 8, analog to digital converter 9, reference source 10, third 115 fourth 12 and fifth 20 13 elements AND, trigger 14, driver 15 measurement time interval, group 16 elements AND, element OR 17, second 18 and first 19 shift registers, modulator 20 two, 25 indicator 21, pulse generator 22 , frequency divider 23, generator 24 single pulses, first 25 and second 26 switches. Fig, I marked the object 27 controls,

The device can operate in two modes of operation: mainly (when controlling an external object) and in self-control mode. In the basic mode of operation, switch 25 is set to 5, and the A when the input of unit 1 is connected to the output of the object being monitored 27. Last the beginning of the measurement is set to the control signature removal mode - the mode in which the reference signature dp of this point of the circuit is removed from the operable object 27, 40, Before the control, the counter 8, trigger 14, registers 18 and 19, divider 23 are set to SC frequency shaper 15. In block 1 establishes the necessary maximum range of measurement of the analog voltage-controlled circuit for a given point.

The voltage divider 2 sets the trigger voltage level of the comparator 3. When this level is reached by the analog signal coming from block 1, the comparator 3 generates a device Start signal. Shaper 15 sets the duration of the measurement window. When the device is connected to a controlled point of the circuit of the object under study 27, an analog signal through block 1 is fed to comparators 3 and 4. After the comparator 3 has triggered (when an analog voltage signal is reached by a comparison voltage), a trigger pulse through element 11 is fed to a single trigger input 14, In this case, from its direct output, a permission signal is received at the inputs of elements 5 and 6 and the driver 15. Feedback wound up from the inverse output of the trigger 14 on (element 11 prevents the appearance of a forbidden state at the S and R inputsSync pulses from generator 22 pass through frequency divider 23 and generator 24 and at frequency f / n go through element 12 to elements 5 and b, since at the other input of element I: 2 the level of the log is set, 1 from the driver's output 15 The output of the latter is set to the level of log. 1 from the moment the resolution signal arrives from trigger 14 to the end of the measurement process of the analog signal.

The device begins to work in the tracking mode, when the first inputs of the elements And 5 and 6 receive the log level. 1 from trigger. 14 "Due to the feedback action (through the reverse counter 8, converter 9 and comparator 4), the native code monitors the input signal with an accuracy of quantization step, if between the measurement rate of the input voltage Ugi (t), the pulse frequency f / n, arriving at the third inputs of the elements And 5 and 6, and the quantization step h place ratio

h and

THEIR

(t) - f,

A parallel code formed at the outputs of the reversible counter 8, steps across the inputs of a group of 16 elements And, the second inputs of which are bitwise connected to the outputs of the register 18 ,. The code change at the outputs of counter 8 and the occurrence of the next loop at the input of register 18 occurs at a frequency f / n. With the arrival of a pulse from the generator 24, the register 18, clocked by the frequency f, carries out the movement of the pulse from the least significant bit to the most significant one, opening one after another elements 16.1 ,,, 16, p. In this case

at the output of the element lUlli 17 receive a sequence code with a frequency of the next-. f. This code is fed to a standard binary sequence compression node consisting of an adder 20 modulo two and a shift register 19, the clock input of which receives impulses of frequency f from the generator and the second KCiviriapaTOpOB 5 second input of the first comparator is connected to the output of the voltage divider and the output is the primary power input of the third element And, the second input of which is connected to the inverse output of the trigger, the direct output of which is connected to the first inputs of the first and second elements And and to

of the torus 22 during the measurement interval, d the start input of the drive drivers are time-based. At the end of the analog signal monitoring process, the binary code generated on register 9 goes to the indicator 21 and is displayed as the ending measurement interval, the single trigger input is connected to the output of the third And element, and the zero input - to the reset inputs of the time driver

The test result is the analog-to-5 measurement interval, the first and second signals.

Claims (1)

In the self-monitoring mode, the switch 25 is set to position B, when the input of unit 1 is connected to the output of source 10 o Further operation of the device is carried out similarly as described for the main mode. Claims: Analog Control Device shift registers, frequency divider and reversible counter and to the output of the second switch 5 whose information inputs are connected to zero and supply potentials, and the control input is the device reset control input, the second input of the first element AND is connected to the input of the element NOT and with the output of the second objects containing a parator pulse generator 25, a second input of the second element, a modulo-two adder, a first shift register, an indicator and a signal level matching unit, an output of a modulo-adder two with the information input of the first shift register n, the first output of which is connected with the first input of the modulo two, and the second output with the indicator input, distinguished by the fact that, in order to simplify the device and expand its scope, due to the possibility of controlling objects without built-in str-hulors, a voltage divider, two com- parators, five AND elements, an NOT element, a reversible counter, an analog-to-analog converter, a reference voltage source, a trigger, a shaper of the measurement time interval, group- are introduced into it. the AND elements, the OR element, the second shift register, a frequency divider, a single pulse generator, and two switches, the control input of the first of which is the reference input 35 40 45 This AND is connected to the output of the element NOT, the third inputs of the first and second elements AND are connected to the VIDEO IN the fourth element I, the first input of which is connected to the first input of the fifth AND element and to the output of the measurement time interval generator, and the second input to the clock the input of the measurement time spanner, the information input of the second shift register and the generator output one1-1 Night pulses, the input of which is connected to the output of the frequency divider, the input of which is connected to the second input of the fifth element And the clock the input of the second shift register and the output of the pulse generator, the outputs of the bits of the second shift register are connected to the first inputs of the AND elements of the group, the outputs of which are connected to the inputs of the OR element, the second inputs of the AND elements of the group, and the group of inputs of the digital-analog converter to the outputs of the bits of the reversible counter, The device is cut out, the first information reading and summarizing the inputs of which The first input of the first switch is connected to the outputs respectively. information input device for connection of controlled output object, second information entry connected the input of the voltage divider and the output of the source of the reference voltage, and the input - with the input of the signal level matching unit, the output of which is connected to the first inputs of the first and second elements And, the output of the VDI element is connected to the second input of the modulo adder two, clock input the first shift register is connected to the output of the fifth And element; the output of the digital-to-analog converter is connected to the second input of the second compa- rator.  the start-up input of the fip pipovatel the measurement interval, a single trigger input is connected to the output of the third element AND, and a zero input to the reset inputs of the time source measurement interval, first and second shift registers, frequency divider and reversible counter and to the output of the second switch 5 whose information inputs are connected to zero and supply potentials, and the control input is the device reset control input, the second input of the first element AND is connected to the input of the element NOT and with the output of the second comp five 0 five This AND is connected to the output of the element NOT, the third inputs of the first and second elements AND are connected to the VIDEO IN the fourth element I, the first input of which is connected to the first input of the fifth AND element and to the output of the measurement time interval generator, and the second input to the clock the input of the measurement time spanner, the information input of the second shift register, and the generator output, 1-1 Night pulses, the input of which is connected to the output of the frequency divider, whose input is connected to the second input of the 5th And clock element the input of the second shift register and the output of the pulse generator, the outputs of the bits of the second shift register are connected to the first inputs of the AND elements of the group, the outputs of which are connected to the inputs of the OR element, the second inputs of the AND elements of the group and the group of inputs of the D / A converter, the first and second elements And, the output of the VDI element is connected to the second input of the modulo two adder, the clock input of the first shift register is connected to the output of the fifth And element, the output of the digital-to-analog converter connected to the second input of the second kompa- .ratora. f JTJTJTnJTJTJTJTJnUTJTTJTJTJTJTJ Compiled by V. Voronkov Editor M. Petrov Tehred L. Serdyukova Proofreader E. Lonchakova : | Akaz 6966/48 Circulation 668 V | NIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab., A / 5 Paloizvodstveno-publishing combine Patent, Uzhgorod, st. Gagarin, 101 FC2 Subscription