SU1432602A1 - Arrangement for monitoring a multichannel magnetic recording apparatus - Google Patents

Abstract

The invention relates to a magnetic recording technique and can be used as built-in diagnostic tools for multichannel digital magnetic recording apparatus. The purpose of the invention is the acceleration of the monitoring process is achieved by using a switch

Description

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tori 2-10, for the spinner 11 and 12 control signals, 13 pulse generator, dividers 14 and 15, recorders 19-24, counter 16, decoder 17, encoder 25, delay block 26 and comparison block 27, decoder 28, drivers 29 and 41 pulses, a recording control unit 30, a waveform generator 31, a sync signal generator 32, a control unit 33. phase mismatch, block 34

1432602

phase jitter, the element OR 35, the block 36 of the control of the memory nodes, the blocks 18 and 37 of the indication 1; The magnetic recording apparatus is continuously monitored during the recording-replay process. In this case, block 18 indicates the health or malfunction of the monitored unit of the magnetic recording apparatus 1, and block 37 indicates the number of the channel under study. 1 il.

one

The invention relates to instrumentation, in particular to a magnetic recording technique, and can be used as an integrated diagnostic tool for multichannel digital magnetic recording apparatus.

The purpose of the invention is to accelerate the control process.

The drawing shows a structure on the device diagram

A device for controlling a multichannel magnetic recording apparatus 1 comprises nine switches 2-10, two control signals 11 and 12, serially connected pulse generator 13, first 14 and second 15 dividers, counter 16, decoder 17 and first display unit 18, six recorders 19-24, the first outputs of four of which are connected to the inputs of the ninth switch 10, the serially connected encoder 25, the delay block 26 and the comparison block 27 connected to the output of the first recorder 19, the decoder 28 between the first m switch 24 and the second input of the comparator unit 27, the first shaper 29 of pulses and the write current control unit 30 connected between the sixth switch 7 and the second recorder 20, as well as the serially connected shaper 31 of the sync signal generator and the control unit 33 phase mismatch, the output connected to the input of the third recorder 2 |, the phase jitter unit 34, the inputs of which are connected to the outputs of the third 4 and fourth 5 switches, respectively, and the output to the input t the registrar 22, the element OR 35, the output of the connection with the additional input of the ninth commutator 10, the unit 36 of the control nodes: memory, the outputs of which through the eighth switch 9 and the fifth registrar 23 are connected to the first - element OR 35; the second input through the sixth recorder 24 is connected to the output of the seventh switch 8, sequentially. the second display unit 37, the first 38 and the second 39 registers and the memory block 40, the input connected to the output of the ninth switch 10, the second pulse generator 41, the input connected to the output of the first divider 14, the output to the input of the first driver 11 control signals, to the installation inputs of all registers and to the synchronization input of the second driver 12 of the control signals, the other inputs of which are connected to the outputs of the first driver 11 of the control signals and with the control inputs of the fifth, sixth, seventh and the eighth cocmutators are 6–9, respectively.

The output of the pulse generator 13 is connected to the input of the reference signal of the second driver 12 of the control signals, the other outputs of which are connected to the control inputs of the ninth switch 10 and to other address inputs of the memory unit 40. The first additional output of the driver 12 is connected to the control; 1-: the input of the memory block 40 and to the set

the input of the second register 39, the second, third and fourth additional outputs, respectively, with the control input of the first register 38, with the clock input of the second register 39 and with the lock input of the AO memory block.

The inputs of the encoder 25, the memory node control unit 36, the sixth 7 and the seventh 8 switches are connected to the corresponding outputs of the magnetic recording apparatus 1, the additional outputs of which are connected to the clock inputs of the decoder 28, the delay block 26 and the comparison block 27. The inputs of the device 1 magnetic recording is connected to the inputs of the switch 6, the output of which is connected to the auxiliary input of the encoder.

The device works as follows.

The magnetic recording apparatus 1 is continuously monitored during the recording-reproduction process. In this case, block 18 indicates the health or malfunction of the monitored unit of magnetic recording apparatus 1, and block 37 indicates the number of the channel under study.

The device contains five control circuits.

The first circuit monitors the errors of the encoders of apparatus 1 by element-by-element comparison of their input signal with the output signal of the reference encoder 25, to the information input of which, in a given monitoring interval, the switch 6 supplies the same signal as the input of the corresponding encoder monitoring device 1. The output signal of the reference the encoder arrives at the comparison with a delay through block 26, the minimum value of which can be equal to two cycles. As a result, at the output of block 27, pulses are generated opshbok information encoders of the device 1, arriving at the input of the recorder 19.

The second control circuit controls the presence of the recording current in the recording magnetic heads of apparatus 1 and the recording amplifiers malfunctioning by matching each response pulse of the magnetic head with the corresponding signal level difference at the recording amplifier input of apparatus 1 in block 30. The first signal comes from the corresponding outputs of apparatus 1 through the switch 7 and the pulse shaper 29, which converts the different-polarity pulses of the reaction into

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the strength of unipolar pulses with normalized amplitudes and duration. The second signal enters through switch 2. In the presence of false response pulses, as well as in the absence of pulses of both signals or one of them, error pulses are generated at the output of block 30 and are fed to the input of recorder 20.

The third control circuit controls the presence of playback signals at the outputs of preamplifiers of reproduction of apparatus 1 by generating a digital reproduction signal using shaper 31, the analog reproduction signal to the input of which is fed through switch 3, and triggering the shaper of the sync signal of reproduction signal . In block 33, the phase error is identified, the integral value of which, when a certain value is exceeded, indicates a phase mismatch. At the output of block 32, a sequence of pulses is formed, reflecting the duration of the phase mismatch, which is then fed to the input of the recorder 21.

The fourth control circuit characterizes the digital signal faults at the outputs of the correctors and the health of the channel synchronizers of apparatus 1, whose current signals are fed to the inputs of block 34 through switches 5 and 4. The error signal enters the recorder 22, where they accumulate during a given monitoring interval .

The first circuit controls the health of the nodes of the decoders of apparatus 1 and the health of the synchronizer of apparatus 1. Teach that not all errors detected by the cyclic control code are corrected by the system of detecting and correcting the errors of apparatus 1, it is possible to judge the malfunction of the nodes by these signals. Pulses of errors of the cyclic control code come from the output of the to-switch 8 to the input of the recorder 24.

The check of the memory blocks of the decoder of the apparatus 1 is carried out by passing each block of input and output information of the memory through the block 36, at the output of which alphabetic errors are generated. From the output of the block

36 through the switch 9, this information enters the recorder 23, the cumulative counter of which has a capacity equal to two errors. & The input signals of the recorders 23 and 24 are combined with an OR element 35, the output of which indicates a failure of the decoders of the magnetic recording apparatus 1.

The control information is alternately received from the output of the switch 10 through block 40, registers 39 and 38 to the input of block 37.

The monitoring interval of a separate recording-reproduction channel is determined, with a signal at the output of the divider 14. Former 1t 4t generates polling and setting pulses, followed by a control shaft and having the same connection to the control inputs of the first one.

equal to 512 clock intervals of the recording signal of the apparatus t.

The output signal of the split 15 has a low frequency and is used for ne

the second, third and fourth switches, the inputs connected to the outputs of the magnetic recording apparatus, form-. clock maker, connected 40

switching counter 16, output 0I supplied through the phor 0of9 of the form of the signal connected to the inputs of the type “| 9) attorney 17 and the former 12. The frequency of the divider 15 is selected to be low so that the operator can simultaneously fix the indicator numbers of the blocks 37 and 13 .

The input and output of the control information from the memory block 40 controls the driver 12 so that, when sequentially inputting into the block 40, control information of the countertruded circuits is entered, reflecting the malfunction of the nodes of this channel of the device 1. In the next control interval, the information reflecting the health of Record channel playback-play, etc. After the end of the input mode within each monitoring interval, the repeating, sequential reading of information from block 40 to shift register 39 is switched on.

In read mode, shaper 12 passes to the corresponding group of address inputs of block 40 signals of the code of the controlled block, forms NOHpyeKftie with counter 16, and signals of the code of the channel number shaper 12 generates itself, enumerating the codes of all channels for each Cycle of communication. Thus, during the luminescence of one of the indicators of the block 18, the information on the health of the nodes of all

with the output of the second switch, the second driver control signals, the decoder, the fifth and sixth switches, the counter, different to those

30 by the fact that, in order to speed up the monitoring process, two pulse formers, six recorders, the seventh and eighth switches, the first display unit, the decoder, were entered into it

35 serially connected pulse generator, first and second g & tits, the output of the last of which is connected to the counter input, outputs connected to the inputs of the second control signal generator, and through a decoder with the inputs of the first display unit, serially connected encoder, delay unit and block comparison, the second input of which is connected through a decoder to the output of the first commentator, and the output - to the input of the first recorder, the recording current control unit, the first input of which is connected through the first impulse driver owls with the output of the sixth switch, the second input with the output of the first switch, and the output to the input of the second register, the phase difference control unit connected between the clock generator and the third recorder, the phase jitter unit, whose inputs are connected respectively to the outputs of the third and fourth switches, output - with the entrance of the fourth

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channels of the controlled block. The width of the registers 38 and 39 and the number of indicators of the block 37 are equal to the number of channels monitored by the magnetic recording apparatus. After entering into the register 39 information about the control of all channels of the generator 12, it generates a pulse, with the help of which the information from the register 39 is copied to the register 38, which controls the indicators of the block 37

Claims (1)

Formula of inventions A device for controlling a multichannel magnetic recording apparatus, containing the first driver of control signals, the outputs of the secondary, third and fourth switches, the inputs connected to the outputs of the magnetic recording apparatus, form-. clock maker, connected go through the fop 0fov9tel signal forms with the output of the second switch, the second driver of the control signals, the encoder, the fifth and sixth switches, the counter distinguished by the fact that, in order to speed up the monitoring process, two pulse formers, six recorders, the seventh and eighth switches, the first indication unit, a decoder, were entered into it, serially connected pulse generator, first and second g & tits, the output of the last of which is connected to the counter input, outputs connected to the inputs of the second driver control signals and, through a decoder with the inputs of the first display unit, serially connected encoder, delay unit and comparison unit whose second input is connected through a decoder to the output of the first commentator, and the output to the input of the first recorder, the recording current control unit, the first input of which is connected through the first impulse generator With the output of the sixth switch, the second input with the output of the first switch, and the output to the input of the second register, the phase difference control unit connected between the clock generator and the third recorder, the phase jitter unit, whose inputs are connected to the outputs of the third and fourth switches, exit - with the fourth entrance the recorder, the OR element, the control unit of the memory nodes, the outputs connected via the eighth switch and the fifth recorder to the first input of the OR element, the second input of which is connected through the sixth recorder to the output of the seventh switch, the second display unit connected in series, first, second registers, block the memory and the ninth switch, the inputs of which are connected to the outputs of the first, second, third and fourth recorders, respectively, while the additional input of the ninth switch is connected to the output of the OR element, The outputs of the first control signal generator are connected to the control inputs of the fifth, sixth, seventh and eighth switches and through the second control signal driver with the address inputs of the memory unit, the other address inputs of which are connected to the control inputs of the ninth switch and other outputs the second control signal generator, the synchronization input connected to the setup inputs of the recorders, the input of the first control signal generator, and the output of the first divider through the second pulse generator, the output of the pulse generator is connected to the reference input of the second control signal generator, the first additional output of which is connected to the control input of the memory unit and to the setup input of the second register, the second, third and fourth additional outputs of the second driver, control signals are connected correspondingly with the control input of the first register, with the clock input of the second register, with the lock input of the memory block, the inputs of the sixth, seventh switches, the contact block ol node memory and an encoder connected to other output apparatus of magnetic recording, to the inputs of which are connected the inputs of the fifth switch, clock inputs of the decoder, the delay unit and the comparator are connected to an additional output of a magnetic recording apparatus, the output of the fifth switch is connected to an additional input of the encoder.