SU1422375A1 - Pulse shaper - Google Patents

Abstract

The invention relates to a pulse technique and permits the elimination of chatter accompanying the rising edge of the input pulse generator signal. The imaging unit contains two RS-flip-flops 1 and 2, delay element 3, input 4 and two outputs 5 and 6, Input 4 of the imaging device is connected to S-input of trigger 1, the direct and inverse outputs of which are connected to S- and R-inputs flip-flop 2. Trigger 2 output through delay element 3 is connected to K-flip-flop 1, Output 5 of the signal of the required duration is the inverted trigger output 1, and output 6 of the bounce-free input signal - flip-flop output 2. 2 Il.

Description

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The invention relates to immersion technology and can be used to generate pulses of the desired duration.

The aim of the invention is to eliminate the chatter accompanying the rising edge of the input signal.

FIG. 1 shows the logic circuit of the imager; in fig. 2 - .time diagrams of his work.

The pulse shaper contains: two RS-flip-flops 1 and 2, element 3 of the back-: hold, input 4 and two signals 5-and 6. Input 4 of the pulse shaper, connected to the L S-input of the trigger 1, the pr - my and inverse outputs of which connected to the S and R inputs of trigger 2, respectively. The output of trigger 2 is connected via delay element 3 to the R output of trigger 1. The first 5 and second 6 formers of the driver are the inverted output of trigger 1 and the output trigger 1gera 2.

; FIG. 2 shows signal diagrams: input 4 shows a diagram a, and output 3 of a delay —g diag; frame b; on the forward and inverse outputs of trigger 1 — a wig diagram and on —former 6. output — diagram d, while dotted lines indicate areas of possible chatter: the pulse former operates as follows q6pa3.

When a signal generator of logical O is generated at input 4, the inverse output of flip-flop 1 is also set to logical O. At the same time, the bounce that accompanies the falling front of the input signal at flip-flop 1 is absent. The occurrence of a logical O signal at the inverse R input of trigger 2 causes it to switch to the opposite state. At the same time, the output 6 of the generator, the signal of which must delay the switching of the flip-flops 1 and 2, repeats the output impulse, sets a logical O signal, and the absence of bounce on the inverse output of the trigger 1 causes its absence and on the considered output of the driver.

In such a state, the driver is in the interval ny determined by the delay of the element

0

five

0

five

0

five

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five

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five

3. After a specified time, a logical signal is fed to the inverse of the R input of trigger 1, providing a setting at its inverse output — a state of logical 1, which is also stored at its direct output. Thus, at the first output 5, a bounce-free signal is formed, the duration of which is determined by the parameters of the delay element 3.

In the considered state, the shaper continues to be until the signal at its input 4 transitions to the logical 1 state. At the same time, the forward output of the trigger 1 is set to a logical 1% signal, and the bounce accompanying the front-rise of the input signal is stored and At the start of the trigger 1. However, the presence of the second trigger 2 ensures the elimination of this bounce accompanying the signal on its S-BXO-- de. Therefore, at the output of the 6-formatter, there is a bounce-free signal that coincides in duration with the input signal.

Thus, the technical and economic advantage of the proposed device; consists in eliminating the drebeega that accompanies the rising edge of the input signal — while maintaining that :; the same possibility of forming a bounce-free signal of a desired duration on the other device output.

Claims (1)

Invention Formula A pulse driver containing an RS flip-flop with inverse inputs, a delay element, an input, and two outputs, the shaper input connected to the S trigger input, the R input of which is connected to the output of the delay element, the inverse flush trigger output of the shaper the output of the driver is connected to the input of the delay element, characterized in that, in order to eliminate bounce, accompanying the rising edge of the input signal, a second RS flip-flop with inverse inputs is inserted, the forward and inverse outputs of the first flip-flop Correspondingly unified with the S- and R-inputs second-, th flip-flop, a direct output of which is connected to the input of the delay element.