SU1383393A1 - Device for converting by walsh functions - Google Patents

Abstract

The invention relates to automation and computing and can be used in information processing systems for building signal spectrum analyzers. The purpose of the invention is to increase the speed of the device by using a faster algorithm for reordering the Walsh transform coefficients. This goal is achieved due to the fact that the device includes accumulative adders 1, switch 2, accumulating adders-subtractors 3, switch 4, shift registers 5, block 6 of the formation of the Walsch-Rademacher functions, generator 7 clock pulses, 8 impulse counter, debris 9, 10, binary code converter 11 to Gre code, AND 12 element group, OR 13 element, AND 14 element group and registers 15. 1 Il.

Description

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The invention relates to automation and computing and can be used in information processing systems for building signal spectrum analyzers.

The purpose of the invention is to increase the speed of the device by using a faster algorithm for reordering the Walsh transform coefficients,

The drawing shows the functional diagram of the device.

The device for converting according to Walsh functions contains accumulative, adders 1, switch 2 (information signals) accumulating adders-counters 3, switch 4 (clock pulses give permission for passing clock pulses to clock input of block 6 forming Walsh-Rademaher functions The outputs of the Rademacher functions of the latter control the operation of switch 2 with N channels.

5 by one, as a result of which the accumulated values are read from adders 1 and multiplied in totalizers subtractors 3 of these values with Walsh functions and accumulated on these

10 adders-subtractors. After the 6 N pulses arrive at the input of the block, the outputs of the adders-subtractors contain values proportional to the Walsh transform coefficients.

After that, it is necessary to obtain the obtained scythes), shift register 5, block 6 to re-order the formation of the coefficients according to Paley.

Walsh-Rademacher functions, 7 clock pulse generator, 8 pulse counter, the first 9 and second 10 decoders, 11 binary code converter to

According to the operator's signal, an installation impulse is supplied to the installation input of the device, which brings the counter of 8 pulses to the zero state. Thereafter

The Gre code, the first group of elements And 12, 20 ° to the operator's signal, is given a pulse by the element OR 13, the second group of elements And 14 and the registers 15.

Walsh integral functions can be represented as

p (i + l, t) L ,, (i, T) dT, О t t, (1), 1,2 ...; p (0, t);

wal (i, t) is a Walsh function. In the matrix form (1) can be written

P WE (2)

where W is the matrix of the Walsh function;

E is a Toeplitz upper triangular matrix whose elements, including the main diagonal, are equal to one. The coefficients of decomposition C, arbitrarily signal f (t) in a series of integral Walsh functions with regard to (2) are equal to

C, - pf (t) W-E-f (t). (3)

In this case, the coefficients C, are ordered according to Walsh, however, in practice, a gate is applied to the device launch input, which starts the generator of 7 clock pulses. At the output of the pulse counter 8, a binary code is generated for the number of the current adder-subtractor i (i 1, N), 25 and a pulse is formed on the i-th output bus of the first decoder 9, which opens the i-th element And 12 of the first group, and the Walsh transform coefficient stored in iM adder-subtractor 3 is fed to the input of the element OR 13. The binary code of the number i is converted to the Gray code r (i) in the 11 binary code converter to the Gray code, and on r (i) -i the output bus of the second decoder 10 appears pulse, which opens the g (1) -th element AND 14 of the second group s of the AND and Walsh transform coefficient of i-ro adder-subtractor 3 is recorded in g () - th register. After all the N Walsh transform coefficients have been rewritten, in registers 15 the coefficients ordered by

thirty

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Claims (1)

but have coefficients ordered by 40 paley. Only N clocks are required. Paley To obtain the Paley-ordered Walsh transform coefficients, the claims of the invention must be used in the following terms: C4) A device for converting to Walsh functions, comprising a binary code converter 45 to Gre code, N (N-size. Conversion) accumulating adders, shift register, first switch, second switch, N accumulating adders, subtractors, first and second group of N elements And in each group, the treatment of the ordinates of the studied process X (t). ment OR, N registers and block form- These ordinates arrive at the information vanes of the Walsh-Rademacher functions, exit whose Rademacher functions are connected to the control input of the first switch, the output of which is connected to information pulses at the outputs of adders 1, the input 55 i-ro (i 1, N) accumulates the sums corresponding to the total adder, output which input process X (t) on the matrix is connected to the first input of the i-ro of the element E, and at this time the shift register 5 of the first group expresses, the first and second outputs receive overflow pulses of the second switch connected to the clock (i ) C (r (i)), i 0, N, where the (1) code of the Gre number i. The device works as follows. The input of the device in binary code to the clock with the clock pulses enters the inputs of the adders 1. The shift register 5 controls the operation of the adders 1. After the shift register 5 arrives at the input, N synchronous gives permission for the passage of clock pulses to the clock input of the Walsh-Rademacher functions forming unit 6. The outputs of the Rademacher functions of the latter control the operation of switch 2 with N channels by one, resulting in a sequential reading of the accumulated values from adders 1 and multiplying in totalizer subtractors 3 of these values with Walsh functions and accumulating them on these adders-subtractors x. After the 6 N pulses arrive at the input of the block, the outputs of the adders-subtractors contain values proportional to the Walsh transform coefficients. After that, it is necessary to recalculate the obtained coefficients according to Paley. effects of repulsing finish Paley. According to the operator's signal, an installation impulse is supplied to the installation input of the device, which brings the counter of 8 pulses to the zero state. Thereafter 0 ° to the operator's signal, a start pulse is applied to the device start input, which starts the generator of 7 clock pulses. At the output of the pulse counter 8, a binary code is generated for the number of the current adder-subtractor i (i 1, N), 5 and a pulse is formed on the i-th output bus of the first decoder 9, which opens the i-th element And 12 of the first group, and the Walsh transform coefficient stored in iM adder-subtractor 3 is fed to the input of the element OR 13. The binary code of the number i is converted to the Gray code r (i) in the 11 binary code converter to the Gray code, and on r (i) -i the output bus of the second decoder 10 appears pulse, which opens the g (1) -th element And 14 of the second group The s of the elements And, and the Walsh transform coefficient from the i-ro adder-subtractor 3 are written in the g () th register. After all the N Walsh transform coefficients have been rewritten, in registers 15 the coefficients ordered by 0 five The inputs of the shift register and the formation of the Walsh-Rademacher function respectively, the output of the i-th Walsh function of which is connected to the control input of the i-ro accumulating adder-subtractor, the clock input of which is connected to the third output of the second switch, the overflow output of the shift register is connected to the control input of the second switch, the information input of which is the clock input of the device, the information input of which is interconnected information inputs of the N accumulating adders, the i-ro move of the shift register is connected to the clock input of the i-ro accumulating adder, the output of which is connected to the i-th information input of the first switch, the output of the i-ro element of the second group is connected to the information input of the i-rb register, the output of which is output of the i-th component of the function Walsh, characterized in that, in order to increase speed, the first and second decoders, a pulse counter and a clock pulse generator, the output of which is connected to the counting input of the pulse counter, the information output of which is connected to the input of the first generator and input Converter binary code in the Gre code, the output of which is connected to the input of the second decoder, 0 the i-th output of which is connected to the first input of the i-ro element AND the second group, the second input of which is connected to the output of the element OR, the i-th input of which is connected to the input of the i-ro element AND of the first group, 5, the second input of which is connected to the i-th output of the first decoder, the start input of the clock generator is the start input of the device, the installation input of which is the setup input of the pulse counter.