SU1370722A1 - Frequency-phase discriminator - Google Patents

Abstract

The invention relates to radio engineering and automation. The purpose of the invention is to make it possible to determine the sign of the phase difference while simplifying. The device contains 1K-triggers 1 and 2, inputs 3 and 4, control inputs (HC) 5 and 6 and outputs (B) 7 and 8. If B 7 is logic. O, then the pulse sequence (PI) arriving at input 3 has either a higher frequency or phase advance at equal frequencies relative to the PI at input 4. If logical. O to B 8, the PI at input 3 has either a lower frequency or a phase lag at equal frequencies relative to the PI at input 4. The sign of the phase difference between the two input PIs can be judged by the presence of logic. O on B 8, and on the magnitude of the phase mismatch — by the duration of the pulses generated on B 7 or B 8. HC 5 and 6 are used to set B 7 and 8 to a certain initial state. 1 il. (L

Description

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The invention relates to radio engineering and automation and can be used in digital synchronization devices with discrete control and in devices for automatic phase adjustment.

The aim of the invention is to make it possible to determine the sign of the phase difference while simplifying.

The drawing shows a circuit diagram of the frequency-phase discriminator.

The frequency-phase discriminator contains the first 1 and second 2 1K flip-flops, inputs 3 and 4, control inputs 5 and 6, and outputs 7 and 8.

Frequency-phase discriminator works as follows.

When a pulse sequence arrives at input 3, which has either a higher frequency or phase advance at equal frequencies relative to the sequence arriving at input A, the 1K flip-flop 2 is set to the O state, the 1K flip-flop 1 is set to the 1 state. of the next defending pulse to the input 4 of the discriminator, the state of the IK trigger 1 does not change, since the S input of this 1K flip-flop has a level O, and the 1K trigger 2 goes into state 1. The next pulse arriving at the input 3 is frequency -phase discriminato and sets the flip-flop 2 1K in state O, the next pulse supplied to the Echod 4 sets 1K-trig ger 2 to state 1, etc.

Thus, when a pulse sequence having either a higher frequency or a phase advance at equal frequencies relative to the sequence arriving at input 4 arrives at input 3, the output O of the frequency-phase discriminator is constantly maintained, and output 8 is generated at the output 8. which is proportional to the magnitude of the phase difference of the pulse sequences arriving at the inputs of the frequency-phase discriminator.

Upon receipt at the input 4 of the frequency-phase discriminator pulse sequence having or

a higher frequency, or a phase advance at equal frequencies of the relativity of the sequence,, incoming at input 3, at the output 8 a level O is set, and at 7 pulses are formed, the duration of which is proportional to the value of the phase difference of the input

0 pulse sequences.

Thus, the state O at output 7 indicates that the pulse sequence arriving at the input 3 of the frequency-phase

6 discriminator has either a higher frequency or phase advance at equal frequencies relative to the sequence entering input 4.

0 State О at output 8 indicates that the pulse sequence arriving at input 3 has either a lower frequency or a phase lag at equal

5 frequencies relative to the sequence entering the input 4.

Therefore, the sign of the phase difference between two input sequences can be judged by the presence of O at one of outputs B and 7 of the frequency-phase discriminator, and the magnitude of the phase mismatch - by the duration of the pulses generated at the output 7 or 8 of the frequency-phase discriminator.

Control inputs 5 and 6 are used to set outputs 7 and 8 to a specific initial state.

Claims (1)

0 claims Frequency-phase discriminator containing two 1K-flip-flops, I- and K-inputs of one of which are connected 5, respectively, with the K- and 1-inputs of the other and are the inputs of the frequency-phase discriminator, the R-inputs of the 1K-flip-flops are the inputs of the initial state setting, characterized in that, in order to make it possible to determine the sign of the phase difference while simplifying, direct output of each 1K-flip-flop is connected to the S-input 5 other 1K-flip-flops, the inverse outputs of which are the outputs of the frequency-phase discriminator. five 0