SU1354414A1 - Frequency divider by three - Google Patents

Abstract

The invention relates to a pulse technique and can be used in automation and computing devices, as well as in frequency synthesizers. The purpose of the invention is to obtain a balanced output signal by introducing a valve 3 and corresponding functional connections. The frequency divider also contains the triggers 1 and 2, the input bus 4. After each transition of the trigger 2 from the state O to 1 and the end of the input pulse at the output of the valve 3, a zero level arises, which one half of the period of the input pulse translates the trigger 1 from nor 1 in O. At the same time, at the output of trigger 1, a sequence of pulses is formed with a ST period, the duty cycle of which is equal to two. The proposed frequency division for three has no forbidden states. 1 il. (L with

Description

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The invention relates to a pulse technique and can be used in automation and computing devices, in frequency synthesizers.

The purpose of the invention is to obtain a symmetrical output signal.

The drawing shows the electrical functional scheme of the device

The frequency divider into three contains the first trigger 1, the direct output of which is connected to the D input of the second trigger 2, the C inputs of the first 1 and second 2 triggers are connected to the first input of the valve 3 and to the input bus 4, the D input of the first trigger 1 is connected with the inverse output of the second trigger 2 and with the second input of the valve 3, the output of which is connected to the R input of the first trigger 1. If the triggers with direct dynamic., C input and inverse static R input are used as the trigger 1 and 2, then the element OR must be used as the valve 3; For a static R input, you must use the element OR NOT, etc.

The frequency divider for three works as follows.

Input pulses with a period T and a factor of two come from bus 4 to the C inputs of the flip-flops 1 and 2, which sequentially switch over to

pulse fronts on the bus 4. At the output D-input of the first trigger.

Editor M.Blanar Order 5714/55

Compiled by A.Sokolov

Tehred M. Khodanich Proofreader M. Sharoshi

Circulation 900 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

De Trigger 2 is formed by a sequence of pulses with a ST period and a duty cycle of three.

After each transition of the trigger 2 from the zero state to a single and the end of the input impulse, the output of the valve 3 results in a zero level, which advances the trigger 1 from the single state to a zero one half way ahead of the input pulse period. Therefore, at the output of trigger 1, a sequence of pulses is formed with a period of ST, the duty cycle of which is equal to two.

The proposed frequency divider into three has no prohibited states.

Formula of invention

The frequency divider into three, containing, the first trigger, the direct output of which is connected to the D-input of the second trigger, the inverse output of which is connected to the D-input of the first trigger, the C-input of which is connected to the C-input of the second trigger and to the input bus.

different is that.

in order to obtain a symmetrical output signal, a valve is inserted into it, the impedance of which is connected to the R input of the first trigger, the first input to the input bus, the second input to

D-input of the first trigger.

Claims (1)

2o claims A frequency divider into three, containing, the first trigger, the direct output of which is connected to the D-input of the second 25 trigger, the inverse output of which is connected to the D-input of the first trigger, the C-input of which is connected to the C-input of the second trigger and the input bus, different in that, 30, in order to obtain a symmetrical output signal, a valve is introduced into it, the output of which is connected to the R input of the first trigger, the first input is with the input bus, the second input is with the D-input of the first trigger.