SU1350620A1 - Frequency relay - Google Patents

Abstract

The invention relates to a measurement technique and can be used to control frequency. The goal of the invention is to increase the accuracy and efficiency of the relay by increasing thermal stability, stability, expanding the range of speed changes in frequency, simplifying tuning. For this purpose, a temporary gate 2, a ruler 3 of the frequency divider, a circuit 4 for the allocation of the calibrated im- are entered into the relay containing the input driver 1 and the coincidence circuit 5. pulse, a quartz oscillator of 6 reference frequency; and a circuit 7 for controlling the frequency divider ruler. 4 il. sl ate about ND

Description

. one .

The invention relates to a measurement technique and can be used to control frequency.

The purpose of the invention is to improve the accuracy and efficiency by increasing thermal stability, stability, expanding the range of speed and frequency, simplifying the setting.

On fIig.l presents a functional on the circuit of the frequency relay; Fig. 2 shows timing diagrams explaining the principle of operation of the frequency relay; FIG. 3 shows examples of the technical implementation of a calibrated pulse allocation circuit; Fig. 4 shows examples of the circuit implementation of a temporary gate, a ruler, divide frequency n, and a control circuit.

The device contains an input form

globalizer I, whose input is a device input, temporary gate 2, frequency divider ruler 3, calibrated pulse extraction circuit 4, coincidence circuit 5, reference frequency crystal oscillator 6, frequency divider ruler control circuit 7 Frequency divider ruler control output 1 is connected to the nepBhiM circuit input 4 selections of the calibrated pulse and with the first input of the circuit 5 coincidence. The output of the calibrated pulse extraction circuit 4 is connected to the first input of the temporary gate 2 and the second input of the matching circuit 5,

The second input of the temporary gate 2 is connected to the output of the quartz oscillator 6 of the reference frequency, and the output is connected to the counting input of the ruler 3 of the frequency divider, the output of which is connected to the second input of the allocation circuit of the calibrated impulse. frequencies, the other inputs of which are connected to the bit outputs of the line 3 of the frequency divider. The output of the control circuit 7 of the frequency splitter ruler is connected to the control input of the frequency splitter ruler 3.

The frequency relay works in the following way.

At the output of the input shaper 1, rectangular positive polarity pulses (Fig. 2a) are generated, which follow at the frequency of the monitored signal and arrive at the first inputs of the selection circuit 4: a calibrated pulse and a matching circuit 5. Back0

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With the front of these pulses, the front of the rectangular pulses of POSITIVE polarity is generated at the output of the calibrated pulse extraction circuit 4 (Fig. 26). With the appearance of the output pulse of the calibrated pulse extraction circuit 4, a temporary gate opens, 2 and the inverted pulses of the quartz oscillator b of the reference frequency (fig.2d) appear at the output of the temporal gate 2, because its output (figv) is connected to the second the input of temporary gate 2, these pulses arrive at the input of the frequency splitter 3 and, after filling it (fig. 2d), the second input of the calibrated pulse extraction circuit 4, the output of which forms the back edge of the positive polarity pulse. Thus, at the second input-coincidence circuit 5 there is a rectangular calibrated pulse of positive polarity of a certain duration. The division ratio of the frequency divider line 3 depends on the state of the frequency divider control circuit 7, and, therefore, the pulse duration at the output of the calibrated pulse extraction circuit 4 also depends on the state of the frequency divider control circuit 7. As the input frequency rises to the set point — the frequency relay triggers a coincidence in time of the generated pulse at the output of the extraction pulse 4 and the output pulse of the input shaper 1 at the inputs of the matching circuit 5, while the output of the matching circuit 5, which is the output of the device, Wits signal logical 1, (fig.2e)

This signal is fed to one of the inputs of the circuit 7 for controlling a frequency splitter ruler. In this case, the control circuit 7 of the frequency divider ruler increases the ratio of the delim. Neyk 3 frequency divider, which is equivalent in this case, the expansion of the output pulse of the calibrated pulse extraction circuit 4, at the time of the device response, which ensures the stability of the relay. In this case, the frequency relay returns to its initial state at an input signal frequency slightly lower than the setpoint of the relay itself.

Claims (1)

Invention Formula A frequency relay containing an input driver, the input of which is a relay input, and a coincidence circuit whose output is a relay output, characterized in that, in order to increase: accuracy and efficiency by increasing thermal stability, stability, expansion of the frequency change rate range , simplify the settings, a temporary gate, a frequency divider ruler, a calibrated pulse extraction circuit, a frequency divider ruler control circuit, and a frequency crystal oscillator, with input shaper connected to the first input of the circuit 13 1350620 the output of the calibrated pulse extraction circuit is connected to the first input of the temporary gate and the second input of the matching circuit, the second input of the temporary gate is connected to the output of the quartz oscillator of the reference frequency, the output of the temporary gate is connected to the counting input of the frequency divider line, output which is connected to the second input of the calibrated pulse extraction circuit, the output of the coincidence circuit is connected to one of the inputs of the control circuit, the other inputs of which are connected at once the serial outputs of the frequency splitter bar, and the output of the control circuit is connected to the control input of the frequency splitter bar .. IG J If Ho 8 ifnottSarHi / n pff / t / mfM vacmomb / 3 С m aipaSut / x fft / foffof fu / fsufiu eeftffne / g focmevntfS Lavda, Sti9t foam saws MuuSfoimttfote InniluC. C e nceffa mvartzeLno true pamofla onapfioi} vaarromf ff t.V Ha oSun u) SxoffoS Citffie / OtiOf / ieffu ka / 1io / ovamno1o uftfiy / iteaV Editor P, Gereshi Compiled by E. Solovyov Tehred M. Morgental 5282/46 Circulation 730 Subscription VNISHI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, “Projectna St., 4 Proofreader N. King