SU1226620A1 - Pulser - Google Patents

Abstract

The invention relates to a pulse technique. It can be used as a universal generator for processing and controlling various automation devices and digital equipment. The purpose of the invention is to increase the reliability of the generator by reducing hardware costs. This is achieved by introducing two D-triggers 6 and 7, a logical element OR 9 and a delay element 10. The device contains a crystal oscillator 1, a pulse counter 2, a decoder 3, program setting blocks 4 and 5, an RS flip-flop 8, a switch 11, a resistor 12. The operation of the pulse generator is explained in the description of the invention. 1 il. with SS

Description

The invention relates to a pulse technique and can be used as a universal generator for testing and controlling p) various devices of automation and digital technology.

The purpose of the invention is to increase the reliability of the device by reducing hardware costs,

The drawing shows a functional diagram of the pulse generator ,.

The pulse generator contains a series-connected crystal oscillator 1, a pulse counter 2, a decoder 3, a first program setting block C of the program, a second program setting block 5, the inputs of which are connected to the corresponding outputs of the decoder 3, while the outputs of blocks 4 and 5 of the program setting are connected according to with the synchronization inputs of the first and second D-flip-flops 6 and 7, the output of which is connected respectively to the S- and R-inputs of the trigger 8, as well as to the inputs of the OR element 9, the output of which through the delay element 10 is connected to the input input score There are 2 pulses and R-in-first-n of the second D-flip-flop 6 and 7, the information inputs of which are connected respectively to the inverse and forward in the trigger codes of the trigger 8. Blocks 4 and 5 back, all programs are executed in the same way and may contain, for example , a switch 1 1 on tn-positions with a resistor 12, connected at the output of switch 11, In the general case, the blocks 4 and 5 of the program set-up consist of a programmed block and a block of

The device works as follows

The initial state of the counter 2 pulses and triggers 6-8 is well, first, in which they are installed, for example, by applying a pulse to the § input of the trigger 7 (not shown) after turning on the power. The program setting block 4 determines the duration of the pulses at the output of the device by block 5 — the duration of the pauses between the pulses. Pulse counter 2 is filled with pulses from the output generator. I, the counter code 2 converts with the decoder 3, the outputs of which are connected to the inputs of blocks 4 and 5 of the program, Depending on the values of the pulse parameters in blocks 4 and 5 of the program, the outputs of these blocks may appear at the same time, but this does not lead to a malfunction of the device, since only one of the two D-flip-flops 6 or 7 always works. When triggers 8 are set to the zero state, the pulse duration is formed at the device output, and when trigger 8 is set to one hundred of - the duration of the pause between the pulses. In these states, trigger 8 is alternately transmitted by signals coming from D triggers 6 and 7. For example, when forming a pulse width, a level 1 is present at the output of the device, which also goes to the D-trigger information input 6, When

the counter reaches 2 pulses of a state in which the decoder code

3 is equal to the code set in the block

4 tasks of the program, at the output of the latter, a pulse appears, the front

which level 1 is recorded in the D-flip-flop 6. With this signal, the flip-flop 8 is set to one, which corresponds to the end of the pulse at the device output and the beginning

forming a pause between pulses. After a time determined by the delay element 10, the pulse counter 2 and the D-flip-flop 6 are set to the zero state through the serially connected element OR 9 and

the delay element 10, for which the delay time of the latter is chosen to be less than half the pulse period of the generator 1, but sufficient to control the pulse counter 2 and the triggers 6-8 through the setting inputs. After zeroing, the counter 2 pulses again begins to fill up with the generator shuhs 1, and when it reaches: the state in which the remote generator 3 code is equal to the code set in program setting unit 5, as the output of unit 5 is a pulse whose front is written level 1 to D-flip-flop 7, since at the information input of this flip-flop there is level 1 from the direct output of flip-flop 8, by the signal from flip-flop 7 the flip-flop 8 is set to zero state, which corresponds to the end of the pause and the beginning of formation pulse output device oystva Through series-connected elements OR 9 and a delay element 10

It sets the zero state of the counter 2 pulses and the D-flip-flop 7.

Next, the operation of the device is repeated. If during the formation of a pulse duration, the signal at the output of program setting block 5, which determines the pause duration, appears before the signal at the output of program setting block 4, the device will not work, since this signal only confirms the zero state D -trigger 7. Similarly, when forming the pause duration, the zero state of the D-flip-flop 6 is confirmed with the arrival of the signal from the program setting unit 4 earlier or simultaneously with the signal from the program setting unit 5.

Claims (1)

Invention Formula Pulse generator, containing a quartz oscillator, sequentially connected pulse counter, decoder Editor N. Rogulich Order 2146/57 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 2266204 RATOR and the first program setting block, as well as the second program setting block and the trigger, the output of which is connected to the output bus of the device, dotlichayuschy-so that, in order to increase the reliability of the device, two D-triggers, an OR element and delays are introduced into it, the output of the quartz oscillator connected to the counting input of the pulse counter, the inputs of the second program setting block are connected to the corresponding outputs of the decoder, the outputs the first and second blocks of the task 5 programs are connected respectively to the synchronization inputs of the first and second D-flip-flops, the outputs of which are connected respectively to the S- and R- inputs of the trigger, as well as to the inputs 20 of the OR element, the output of which is connected to the R-input of the pulse counter via the delay element and to the R-inputs of the first and second D-flip-flops, whose information inputs are connected 25 respectively to the inverse and direct outputs of the trigger. Compiled by V. Lobyntsev Tehred V. Kadar Proofreader A. Tsko