SU1339881A1 - Pulse-shaping apparatus - Google Patents

Abstract

The invention can be used in pulse technology, in the field of automation of energy systems. The aim of the invention is to increase the stability of the device and reduce the recovery time. To achieve this goal, the device containing the first and second elements AND-NOT 1 and 2, the counter 4 and the generator 5 stable frequency pulses are additionally introduced: the third element IS-HE 3, the RS flip-flop 6 and the driver 7 short pulses. The operation of the device is illustrated by timing diagrams. Self-sustaining of the device in the actuated state is performed by the output sigal of the RS-flip-flop 6 through the IS-NOT 2 element. generator 5. 2 Il. с: с со с СХ) 00 Фие

Description

113

The invention relates to a pulse technique and is intended for use in the field of automation.

energy systems

The aim of the invention is to increase the stability of operation and reduce the recovery time.

FIG. 1 shows a diagram of the device; FIG. 2 shows the time diagrams of his work.

The device contains the first 1, second 2 and third 3 elements AND-NOT, the counter 4 emgulsov, generator 5 pulses of a stable frequency, RS-flip-flop 6 and shaper 7 short pulses,

The first element AND-NOT 1 is the first input connected to the input bus of the device, the first and second inputs of the third element AND-NOT 3 are connected to the outputs of the first 1 and second 2 elements AND-NOT and the output is connected to the C input of the counter 4, To the input connected through the shaper 7 short pulses to the input bus, the output of the generator 5 is connected to the second inputs of the first 1 and second 2 elements AND NOT, trigger 6 with its S and R inputs connected respectively to the first and second outputs of the counter 4, and which is the output of the device, to the first input of the second element and AND NOT 2.

The device works as follows

In the initial state, the AND-NE element 3 is in the logical zero state. When a pulse of interference appears at the input of the device, 25) a bundle of pulses from generator 4 appears in the C input of counter 3 (Fig 26). At the same time, a zeroing pulse appears at the input of counter 3, generated by shaper 7 (Fig. 2-). But the transition of trigger 6 to a state of logical one does not occur, since the division ratio of counter 3 by output Q is set so that counter 3 - it does not have time to fill, to the required value, and at output Q, connected to the S input of trigger 6, the signal of logical zero remains (Fig. 2). When appearing at the device input pulses with

the output time of the pulse comparison circuit measuring body (not yet 2

Zana), with sufficient duration (second and subsequent pulses and g, Fig. 2S), the S-input of the trigger 6 from the first Q, the output of the counter 4 receives the signal of the logical unit (Fig.2a), while at the R-input trigger 6 (output Q of the counter, 4) there is a logical zero signal (Fig. 2). At output Q of flip-flop 6, a signal of a logical unit appears as a result (FIG. 2e). The output signal of the logic unit of the trigger 6 through the element AND-NOT 2 is the device being held in the actuated state. After the last pulse at the input disappears after a certain time, the signal of the logical unit (Fig. 2) appears at the R input of trigger 6 (Fig. 2.) and the trigger 6 returns to the initial state. The return time, counted from the leading edge of the input pulses, is determined by the period they follow T and depends on the division ratio K of the counter, according to the code Q, j and the frequency f p

rator 5, tg -r2- + t, s T, where t I g

stock time.

Chk

Claims (1)

Invention Formula A pulse shaping device containing the first NAND element, the first input connected to the input bus, the second NAND element, a stable frequency pulse generator and a counter, characterized in that, in order to increase the stability of operation and reduce the recovery time, a third element is introduced AND-NOT, shaper of short pulses and RS-trigger, the third element AND-NOT connected to the outputs of the first and second elements AND-NOT, and the output to the C input of the counter, R-BXO-ohm connected through the driver of short pulses to input At the bus, the output of the stable frequency pulse generator is connected to the second inputs of the first and second NAND elements, the trigger is connected to the first and second outputs of the counter by its S and R inputs, respectively, and to the output of the second output, respectively. Element and NOT. five g Tt imi Compiled by G. Brynsky Editor L. Gratilo Tehred L. Serdyukova Order 4245/55 Circulation 901 Subscription VNIIGSh of the USSR State Committee for inventions and discoveries 113035, Moscow, F-3b, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 .Z Proofreader M. Pojo