SU1246351A1 - Generator of single pulses - Google Patents

Abstract

The invention can be used in electrical measuring and computing devices of various types. The purpose of the invention is to increase the speed of the device. The shaper contains the triggers 1 and 2, the element And 3 and tires 4, 5 and 6 clock pulses, input and output, respectively. Connecting the R input of trigger 2 to the J input of trigger 1 whose R input is connected to the inverse output of trigger 2 reduces the recovery time of the device, which is determined only by the trigger time of 2, 2 or less. ABOUT JV

Description

The invention relates to a pulse technique and can be used in electrical measuring and computing devices for various purposes.

The purpose of the invention is to increase the speed of the device by reducing the recovery time.

Figure 1 shows the functional diagram of the generator single pulses; 2 shows timing diagrams for his work.

The shaper single pulse contains the first trigger 1, the second trigger 2, the element And C, the bus 4 clock pulses, the input bus 5 and the output bus 6.

The output of trigger 1 is connected to one of the inputs of the IZ element, the other input of which is connected to the 4-clock bus, and the C-input of the trigger 1, whose K-input is connected to the bus of the logical unit, and 3-in is connected to the input bus 5 and R - the input of the trigger 2, the C-input of which is connected to the output of the element I 3 and the output bus 6, and the inverse output is connected to the R-input of the trigger 1.

The device works as follows.

In the initial state at the output of the trigger 1 (Fig. 2b), the level of logical zero, which prohibits the passage of clock pulses (Fig. 2a to the output of the And 3 element), at the inverse output of trigger 2 (Fig. 2d) the level of the logical unit due to signal (Fig.26) at its R-input.

When a logical unit signal arrives on bus 5, the state of the triggers does not change.

At the moment corresponding to the end of the first clock pulse

after the input signal is received, the trigger 1 is set to one state, allowing the passage of clock pulses through the element 3. The next clock pulse within the input signal passes through the element 3 to the output bus 6 (Figure 2d). On the trailing edge of this clock pulse, trigger 1 is set to the zero state, and trigger 2 is set to one. In this case, the trigger 1. is blocked on the R-input until the end of the action of the input pulse.

At the moment of termination of the input pulse, trigger 2 at the R input is set to the zero state, and blocking from the R input of trigger 1 is removed.

As can be seen, the recovery time of the proposed device is determined only by the trigger time 2.

Claims (1)

Invention Formula A single pulse shaper containing two triggers and an element I, one of the inputs of which is connected to the output of the first trigger, the J and K inputs of which are connected to the input bus and the logical unit bus, respectively, and the C input connected to the bus clock pulses and another input element And, the output of which is connected to the C input of the second trigger and the output bus, due to the fact that In order to increase speed, the R-input of the second trigger is connected to the J-input of the first trigger, the R-input of which is connected to the inverse input of the second trigger. Compiled by V. Potapov N. Bobkova Editor Tehred L. Oleinik Proof-reader I. Erdeyi 4021/55 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 P | “marketing and printing company, Uzhgorod, st. Project 1 4 iput.Z