SU1319041A1 - Interface for linking electronic computer with using equipment - Google Patents

Abstract

The invention relates to the field of computer technology, in particular to devices for interfacing subscribers with a computer, and can be used in data transmission systems. The aim of the invention is to reduce equipment. The device contains a group of buffer registers, two pulse distributors, a reversible counter, a synchronizer, a decoder, a counter, a group of elements AND, an element OR. 1 il. 00 with

Description

one

The invention relates to computer technology, in particular to devices for interfacing subscribers with a computer, and can be used in data transmission systems.

The purpose of the invention is to reduce equipment,

The drawing shows a block diagram of a device for interfacing a computer with a subscriber.

The device contains a group of buffer registers 1, the first dispenser 2 pulses, the second dispenser 3 pulses, the element OR 4, the reversible counter 5, the group of elements And 6, the synchronizer 7, the decoder 8, the counter 9, information input 10 and output 11 of the device, information inputs 12 , write inputs 13, sample inputs 14 and information read inputs 15 from buffer registers 1, device outputs 16, read enable output 17, summing 18 and subtracting 19 reversible counter inputs 5, first 20 and second sync synchronizer inputs 7, set the first input 22 and the count input of the counter 23, 9, 24 and the clock 25 of the device.

The serial connection of the outputs of registers 1 to the output 11 of the device for pairing is carried out via wired OR, which is controlled through the inputs 14 of registers 1 from the distributor of 3 pulses. The pulse distributor 2 is designed to write information by a parallel code from a computer through input 10 of the device to the buffer registers 1. Information reading from the buffer registers 1 is controlled through inputs 15 from the AND 6 elements. Reversible counter 5 is designed to output information about the number of free buffer registers in the computer, as well as for forming through the element OR the signal Resolution for the subscriber. The synchronizer 7 is designed to synchronize the addition and subtraction pulses at the inputs of the reversible counter. The counter 9 and the decoder 8 are designed to highlight the K-th pulse required to connect the next register to issue the information word with a serial code to the subscriber.

The device works as follows.

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When the power is turned on, the device generates a pulse General reset, which reset all elements with memory, i.e. buffer 5 registers 1, distributor 2, counters 5 and 9, synchronizer 7. When the distributor is reset to its initial state, 3 pulses are written to its first bit, i.e. From the first buffer register 1, the third state is removed and its output is wired OR connected to the output 11 of the device.

The computer, according to the state of outputs 16 of the interface device, determines that all buffer registers 1 are free and you can start transmitting information words to the subscriber.

The subscriber, via output 17 of device 20, determines that the buffer stations 1 are free.

The information word intended for issuing to the subscriber from the computer goes through the input 10 of the device to match the input 12 of the buffer registers 1. The first clock pulse (s) from the computer through the input 24 of the device goes through the synchronizer 7 to the input of the distributor 2 pulses, excites the first bit of this distributor. The impulse from the excited discharge goes to the input 13 of the corresponding buffer register 1, providing a record of the information word to it. In addition, the first SI from the first output of the synchronizer is fed to the input 18 of the reversible counter 5, increasing its state by one.

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The result of adding from the outputs of the reversible counter 5 through the output

The device in binary code enters the computer, which monitors the number of free buffer registers 1, so that there is no loss of the information word or malfunction of the device for pairing. From the exit

17 according to the result of the reversible counter 5 state through the element OR 4

the subscriber is assigned a permission by which the subscriber is allowed to contact the device for mating for information. From input 25, device 45

55

Your request pulses (FROM) are received through AND 6 elements at input 15 of only that buffer register 1 that is currently connected to output 11 of the device, indicating information 313.

The word is a serial code to the subscriber. In addition, FROM are sent to the counting input 23 of the counter 9, which calculates the FROM required dp of issuing the K-bit information word to the subscriber. The decoder 8 selects the K th OF, which is fed to the input 22 of the installation of the counter 9 to the initial state and through the second input 21 of the synchronizer 7 to the input 19 of the reversible counter 5, reducing its state by one and to the input the distributor of 3 pulses, exciting the next bit of the distributor of 3 pulses and connecting the next buffer register 1 via wired OR to the output 11 of the device, thereby preparing the next information word to the subscriber.

Claims (1)

Invention Formula A device dp interface of a computer with a subscriber containing a group of buffer registers, two pulse distributors, a reversible counter, a decoder, a counter, an OR element, and the information inputs of the buffer registers of the group form the group of inputs of the device dp connected to the group of information outputs of the computer are the output of the device dp connection to the subscriber's information input, the group of outputs of the reversible counter is connected to the group 14 understand the inputs of the OR element and form a group of device outputs for connecting to a group of information inputs, a computer, the output of the OR element is the output of the device dp connection to the subscriber readout input input, the group of outputs of the counter connected to the group of information inputs of the depressor, the output of which is connected to the input of the installation of the counter; such that, in order to reduce the equipment, a synchronizer and a group of elements AND are entered into it, the first synchronizing input of the synchronizer being input devices for connecting to the synchronous output of the computer, the counting input of the counter is connected to the first inputs of elements AND of the group and is the input of the device dp connected to the subscriber's sync output, while the output of the decoder is connected to the second synchronous input of the synchronizer the subtraction input of the reversible counter and with the synchronous inputs of the first and second pulse distributors, respectively, a group of outputs of the second pulse distributor connected to the second inputs of the AND elements of the group , the outputs of which are connected to the read inputs of the buffer registers of the group. Editor Oh, Bugir Compiled by S. Pestmal Tehred I. Popovich Order 2514/44 Circulation 672 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 Proofreader A. Obruchar