SU1310769A1 - Digital averager of durations of time intervals - Google Patents

Abstract

The invention relates to a pulse technique. The purpose of the invention is to expand the functionality of the device. The digital averager contains valves 7 and 8.1, trigger 13.1, counter 9, generator 16 of the reference frequency. To achieve this goal, a 1 code converter, 6.1–6.P mismatch elements, (n – 1) gates 8.2–8.and reversible counters 10.1–10.p and triggers 13.2–13.p are entered into the device. silt Zf 2.2 i (L with a X)

Description

The invention relates to a pulse technique and can be used for averaging time intervals arriving along n parallel channels.

The purpose of the invention is to expand the functionality.

The drawing shows a functional diagram of the device.

The digital averager of the time interval length contains a converter of I codes with n inputs 2.1-2.P, accumulating adder 3 with output 4 overflow and input 5 synchronization, elements 6.1-bp mismatch first valve 7, second valve 8.1, ( 1) gates 8.2-8.p, counter 9, reversible counters 10.1 10.p with outputs ll. 1-ll.n of transfer and outputs 12.1-12.P loan, trigger 13.1-13.P mark with inputs 14.1-14.P set to one state and inputs 15.1-15.P set to zero state, as well as generator 16 standard frequency.

Inputs 2.1-2. A converter 1 of the codes are the inputs of the device, while the inputs 2.1-2. Are connected to

the first inputs of the corresponding elements 6.1-bp mismatch and. the summation buses of the corresponding reversing counters 10.1-10.p, the outputs of the converter 1 codes are connected to the inputs of accumulating adder 3, the output 4 of which overflows is connected to the second inputs of the 6.1-bp elements of the mismatch, the subtraction buses of the reverse meters 10.1-lO.n and the first input of the first valve 7, the output of which is connected to the counting input of the counter 9, the first inputs of the valves 8.1-8. The pins are connected to the outputs of the corresponding 6.1-B.p. mismatch elements, the second inputs of the valves 7 and 8.1. and connected to the outputs of the generator 16 reference frequency and synchronization input 5 of accumulating adder 3, transfer outputs A. 1-11.P reversing meters 10.1-10.p are connected to the corresponding inputs 15.1-15.P setting to the zero state of the trigger 13.1 - 13.p mark, outputs 12.1 -12.p loan of reversible counters 10.1-10.p are connected with the corresponding inputs 14.1-14.p of installation in the unit state of the flip-flops 13.1-13.p mark.

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Digital averager the duration of the time intervals works as follows.

In the initial state, the accumulating adder 3, the counter 9, the reversible counters Ш.1-10.П deviations and the triggers of the 13.1-13.p mark are set to the zero state. If the inputs 2.1-2.P converter 1 of the codes do not receive high level signals, then the outputs of converter 1 present the zero code, which, upon the arrival of each clock pulse from the generator 16, is added to the accumulating adder 3 without changing its zero state to the output 4 of the overflow of the adder 3 at the same time there is a zero potential, which coincides with the zero level at all inputs 2.1-2.P. Therefore, at the outputs of all elements of 6.1-bp there is also a zero level that blocks the flow of pulses from the generator 16 black of 8.1-8.P valves 7 and 9 at the inputs of the counter and the reversible counter 10.1-10.P, state and last state 13.1-13.P trigger while not vary. The digital averager operates on the principle of discretization of incoming time interval durations with a sampling step equal to the clock period of the generator 16 and can be used to process both parallel and successive time interval durations.

When entering parallel to the input from inputs 2.1-2, n over one time interval, the beginning and end of which can be completely arbitrarily oriented in time relative to other time intervals, the number of time intervals simultaneously present at the inputs 2.1-2.P converts 1 time interval The digital code, which upon arrival of the clock pulse at the synchronization input 5, is added to the accumulating adder 3, at the output 4 of which overflow, a high level signal is generated in the case where the sum is the stepping code and already in the accumulating adder is greater than or equal to n. This overflow signal allows through the gate 7 the arrival of one pulse from the generator 16 to the input

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counter, 9, i.e. accumulator adder 3 accumulates the lower digits of the sum and fractional parts of the average duration of n time intervals, and counter 9 accumulates the higher digits of the sum and intact part of the average length n of the time intervals, so the counter capacity 9 must not be less than the duration maximum expected time interval. The absolute deviations of the time intervals from the average value are accumulated in the reversible counters 10.1-Yu. The deviations to which the counting pulses arrive through the gates 8.1-8.P., Allowing the potentials to be received from the corresponding elements 6.1-6. In the presence or absence of the Overflow signal at the output 4 of the adder 3 and the time interval at the input 2.1 at the output of the mismatch element 6.i, there is a zero potential that prohibits the flow of pulses from the generator 16 through the gate 8.1 to the counting input of the reversible counter 10.1.

At the moment of the presence of the overflow signal and the absence of a time interval at the input 2.1, at the output of the mismatch element 6.1, a resolving single signal appears and the pulses from the generator 16 are fed through the gate 8.1 to the input of the reversible counter 10.1 deviations, reducing its content, since on the subtraction bus counter there is a single signal from the output 4 of the overflow of the adder 3.

At the moment of the presence of a time interval at the input 2.1 and the absence of a signal-overflow from the output 4 of the adder 3, the pulses from the generator 16 arrive at the counting input of the reversible counter 10.1, increasing its state, since there is a single signal on the addition bus of this counter the duration of which determines the 1st time interval, i.e. in the reversible counter 10.1 deviations the accumulation of the difference t- - tj occurs. where t- is the duration of the 1st time interval; t .р - the average value of the duration of n intervals. To indicate the sign of the absolute deviation, trigger 13.1-13P are used, which are controlled by an RIG94

Ways from outputs 11.1-ll.n of transfer and outputs 12.1-12.P of a loan of corresponding reversible counters 10.1-10.P deviations. For example, if the reversible counter 10.1 deviations are in the zero state and subtraction starts from it, then its zero state changes to the All units state, and

loan exit, a high level signal is generated, which sets the corresponding sign trigger to one state, which indicates that it is in reverse

counter 10.1 negative numbers in the additional code. If then there is a summation of pulses in a reversible counter, and the number of summed pulses is greater than the number

the pulses that were previously subtracted, then a high level signal is generated at the transfer output of the reversible counter, which sets the corresponding

a sign trigger to the zero state, which indicates the presence of a positive number in the reversible counter of deviations in the forward code. For correct operation of the Hbfx reversible counter 10.1-lO.n and trigger 13.1-13.P mark it is necessary that the capacity of each reverse counter lO.l-lO.n is not less than the value t - t oKC / nl where the duration of the maximum expected time interval.

When using a device for processing successively arriving n time intervals over one channel, each time interval must be applied to one of the inputs 2.1-2.P device, while the remaining inputs must have a zero potential. Device is working

similarly to that described, whereby the mean value of the n time intervals arriving at one input is determined, but no deviations of the duration of each time interval received at one input from the mean value are found.

Formula inventions

Digital Duration Averager

time intervals, containing the generator of the reference frequency, two valves, a trigger, a counter, the input of which is 51

This is connected to the output of the first valve, the output of the reference frequency generator is connected to the first inputs of the first and second valves, characterized in that, in order to expand its functionality, a code converter accumulates an adder, (n-1) valves, n mismatch elements, n reversible counters and (n-1) sign triggers, each of the device inputs being connected to a corresponding input of the code converter, the first input of the corresponding mismatch element and the summing bus of the reversing counter ka, converter output code connected to the corresponding inputs of the accumulator, the output overflow koRedaktor A.Ogar

Compiled by V. Kotov

Tehred L. Serdyukova Proofreader M.Sharoshi

Order 1888/43 Circulation 371 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

696

Secondly, connected to the second inputs of the n misalignment elements, buses for subtracting n reversible meters and the second input of the first valve, the code of the generator of the station frequency is connected to the synchronization input of the accumulating adder and the first inputs of each of the (n – 1) gates, the outputs of each of the n elements the mismatch is connected to the second inputs of the corresponding valve, the output of which is connected to the counting input of the corresponding reversible counter, the transfer output of which is connected to the input of setting the corresponding trigger to zero and the sign, the installation input in the unit of which is connected to the loan output of the corresponding reversible counter.

Claims (1)

Claim A digital averager for the duration of time intervals containing a reference frequency generator, two gates, a trigger, a counter, the input of which is connected to the output of the first gate, the output of the reference frequency generator is connected to the first inputs of the first and second gates, characterized in that, in order to expand the functionality , it includes a code converter accumulating an adder, (p-1) gates, n mismatch elements, η reversible counters and (p-1) sign triggers, with each of the device inputs connected to the corresponding the corresponding input of the code converter, the first input of the corresponding mismatch element and the summing bus of the reversible counter, the outputs of the code converter are connected to the corresponding inputs of the accumulating adder, the overflow output of which is connected to the second inputs of the mismatch elements, with the subtraction buses η of the reverse meters and the second input of the first valve, the output 5, a reference frequency generator is connected to an accumulation synchronization input. the adder and the first inputs of each of the (n-1) valves, the outputs of each of the n mismatch elements 10 are connected to the second inputs of the corresponding valve, the output of which is connected to the counting input of the corresponding reversing counter, the transfer output of which is connected to the input 15 of the installation to zero corresponding a sign trigger, the unit input of which is connected to the output. loan of the corresponding reversible counter.