SU1298895A2 - Scaling device with checking - Google Patents

Abstract

The invention relates to a pulse and computing technology, is complementary to the author. No. 1149400 and can be used to control the counting device. The purpose of the invention is to reduce the time control. To achieve this goal, trigger 13 and element 14 are entered into the device. 1 Il. w g (L TL, y from 00 00 co ate CjzJ1Ч

Description

The invention relates to a pulse and computer technology, can be used to control the counting devices and is an improvement of the device according to the author. St. No. 1149400.

The purpose of the invention is to reduce the time control.

The drawing shows a block diagram of a scaler with control.

The device contains a counter 1, the first element And 2, the trigger 3, the element 4 delay, one-shot 5, the second element And 6, the first additional trigger 7, the element In the display, the third element And 9, the element OR NOT 10, the second. Additional trigger 11 counting input 12, the third additional trigger 13 and the fourth element And 14.

The direct output and the secondary trigger 7 are connected respectively to the input of the display element 8 and to the output of the second element 6, the inputs of which are connected to the inverse outputs of the bits of the counter 1, to the output of the one-shot 5 and to the output of the delay element 4 whose input is connected to the output The first element 2 and 2 with the first input of the trigger 3, the second input and output of which are connected respectively to the output of the delay element 4 and to the first input of the first element 2, the second input of which is connected to the counting input of the counter 1 and the third And 9, the inputs of which are connected respectively by the counting input 12 of the device, the inverse output of the additional trigger 7, and the direct output of the second additional trigger 11, whose input is connected to the output of the OR-NO element 10, whose inputs are connected to the inverse outputs of the bits counter 1. Pr my exit. the older bit of counter 1 is connected to the input of the one-shot 5 and one and the inputs of the fourth element I 14, the remaining inputs of which are connected to the inverse outputs of all bits of counter 1, except the senior, the output of the fourth element 14 and 14 is connected to the first input of the third additional trigger 13, the second input and output of which are connected respectively with the output of the second Ibis element to the reset input of the counter 1.

.-

. ".S, yn

25 jq h oo35

40

45

50

55

The device works as follows.

In the initial state, after the signal has been given over the first bus of the installation (not shown), the triggers 7, 11 and 13 are set to the zero state, and the trigger 3 is set to one. When a signal is sent over the second bus of the installation (not shown), all the bits of the counter, if they are in good condition, are set to one, and at the output of the OR-NE element 10 there appears a unit potential that sets trigger 11 to one. at the same time, the unit potential from its direct output together with the unit potential from the inverse output of the trigger 7 opens the element AND 9 and the passage of the pulse sequence (if present) from the counting input 12 to the counting input of the counter 1 and the corresponding input is allowed d AND gate 2, to the other input of which is supplied with a potential edinichn1y direct output of the trigger 3. From the first input pulse train pulse counter 1 is started, and the delay element 4. Simultaneously with the launch of the delay element 4, the output pulse of the first element And 2 switches the trigger 3 and the prohibition signal from the output of this trigger appears at the other input of the first element And 2. The impulse from the output of the delay element 4 returns the trigger 3 to the initial state, as a result of which again the resolving potential is supplied to the input of the first element And 2.

From the output of the delay element 4, a pulse is also fed to the input of the multi-input second element I 6, the other inputs of the co. Are connected to the inverse outputs of the bits of counter 1, and one of the inputs to the output of the one-oscillator 5 connected to the output of the high bit of the output counter discharge 1. The one-vibration 5 generates a positive pulse when a positive differential signal arrives at its input.

If counter 1 is operational, then the moment comes when all the inputs of the multi-input fourth element I 14 simultaneously appear logical units taken from the inverse outputs of the lower bits of counter 1 and from the direct output old

The first bit of counter 1. This causes a logical unit signal at the output of the fourth element I 14, which switches the third trigger 13, which leads to the appearance of a logical unit on the forward trigger of this trigger, which will affect the reset input of the counter 1, puts it in the zero state, with logical units appearing at all its inverse outputs, at the output of the single-severity, acting on the inputs of the multi-input second element And 6, logical units appear simultaneously, removed from the output of the mono-5 and element 4 aderzhki. In this case, a signal of a logical unit appears at the output of the second element I 6, with which trigger 7 is switched, which leads to the appearance of a signal of a logical unit at the forward output of this trigger and a signal of a logical zero at its inverse output, which arrives at one of the the inputs of the third element And 9, prohibits the passage of the input pulse sequence through the third element And 9 to the input of the counter 1, and the signal from the direct output of the additional trigger. A. Kozoriz Order 897/58

Compiled by V. Rakov Tehred L. Serdyukova Proofreader A. Ilyin

Circulation 902 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

Hera 7 turns on the element B of the display, indicating the operability of the counter 1,

In case of failure of one of the bits of the counter 1 at the output of the second element And 6, the signal does not appear and the display element 8 does not turn on, which indicates the inoperability of the counter 1.j

Claims (1)

Invention Formula  counting device with control on aut. St. No. 1149400, that is, in order to reduce the monitoring time, a third additional trigger and a fourth AND element are entered into it, the first input of which is connected to the forward output of the most significant bit of the counter, the inverse outputs of the other bits of which are connected with the rest of the input14 And the fourth element And, in which code. connected to the first input of the third additional trigger, the second input and output of which are connected respectively to the output of the second element And and to the reset input of the counter.