SU1287257A1 - Generator of frequency spectrum - Google Patents

Abstract

The invention can be used in digital information processing equipment, in electronic chronizers and time meters. The aim of the invention is to enhance the functionality and increase the reliability of the driver. To achieve the goal, a memory block 5 is entered into it, the analyzer 4 overflows, and the channel number sensor 2 is configured as an address counter. The shaper also contains a shaper 6 of the reference frequency, da.pikch 2 channel numbers, a 3 clock counter, a comparison block 8, an address decoder 9, a 1 code sensor. This frequency grid former makes it possible to form pulse sequences with a pulse frequency that decreases with an increase in the output number with a relative multiplicity factor. The description also contains the formula for the pulse frequency at the output corresponding to the address of Sensor 1. 1 Il. (L with

Description

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The invention relates to a pulse technique and can be used in digital information processing equipment, in electronic synchronizers, and time meters.

The aim of the invention is to enhance the functionality and increase the reliability of the driver.

The drawing shows a functional diagram of the frequency grid former.

The frequency grid former contains a 1 code sensor, implemented, for example, on a storage device (memory), a channel number sensor 2, which is illuminated, for example, on a counter, a 3 clock counter, the count input of which is connected to the analyzer 4 overflow output, information inputs the outputs of the memory block consisting of a random access memory (RAM) 5, and the outputs are connected to information inputs of the RAM 5, the input of the reference frequency generator 6 is connected to the input bus 7, the outputs of the former 6 are connected to the clock input of the sensor 2, to the input m recording RAM 5, with synchronization inputs of the analyzer 4 overflow, with the recording input of counter 3 and with the reset input of the comparison block 8, the decoder 9 channels, the address inputs of which are connected to the outputs of sensor 2 and the address inputs of sensor 1 and RAM 5, the outputs are connected with the output buses 10, the gate input of the decoder 9 is connected to the first output of the comparison unit 8 and to the installation input of the counter 3, the first group of information inputs of the comparison unit 8 is connected to the outputs of the counter 3, the second group of information inputs are connected to the outputs of the dates The second output of the code comparison unit 8 is connected to the information input of the overflow analyzer 4, the output of which is connected to the synchronization input of the comparison unit 8.

Analyzer 4 contains two B-triggers 11, 12 D-input of the first of which ™ is connected to the information input of the analyzer 4 overflow, inverse output - with the D-input of the second D-trigger 12, the output of which is connected to the output of the analyzer 4 overflow with C -the input of the first D-flip-flop 1, the installation input of which is connected to the first synchronization input of the analysis

mash 4 overflows, the second synchronization input and the counting input of which are connected to the installation input and to the C input of the second D-flip-flop 12,

Block 8 comparing the frequency grid former contains the equality element 13 of the codes, the first and second groups of inputs of which are connected respectively to the first and second groups

the inputs of the comparison unit 8, the output with the D input of the trigger 14 and with the second output of the comparison unit 8, the reset input of which is connected to the reset input of the comparison unit 8, the C input with the input

synchronization of block 8. comparison, direct output - with the output of block 8 comparison.

Shaper grid frequency works as follows

Starting from the moment of overflow of the sensor 2, in which the analyzer 4 is set to the initial state and the sensor 1 and the RAM 5 carry out the contents in the address O, in each tick formed by the driver 6, the result of the comparison of the contents in the RAM 5 and the sensor 1 in D trigger 1I o

D-flip-flop 11, set by a pulse from the transfer output of sensor 2 to one state, sets to state O from the C input at the first signal O (inequality) from the output of element 13, after the same transition D-flip-flop 11 to O can be reset only at the reset input, t, e, a pulse of sensor transfer 2.

Such a mode is ensured by the fact that state B of trigger 11 at each clock cycle is rewritten into D-trigger 12, which is forcibly in the same clock cycle with a time delay.

is set to the state. Thus, a negative impulse is formed at its output only if D, flip-flop 11 kept 1, including, the sign of transfer from the previous address. A positive front from the output of D-flip-flop 12 in this case changes the state of D-flip-flop 11 to O, and the following pulses at the C-input of D-flip-flop 11

do not change its state 1, t, k. the formation of negative pulses is terminated at the output.

By dropping the negative pulse from the output of the D-flip-flop, the sign of the transfer from this address to D-flip-flop 14 is also fixed and the state of the counter 3 is changed by one, hence, the contents of RAM 5 at this address. Thus, if the codes in RAM 5 and sensor 1 are equal in this address and there is a transfer sign from the previous address (pulse from the output of D-flip-flop 12), D-flip-flop 14 is set to the C input to one and reset to the input reset. A positive pulse from the output of the D-flip-flop 14, transmitted to the C input of the decoder 9, appears on the output bus 10 having the number corresponding to this address, and also resets the counter 3 and thereby provides an entry in the RAM 5 O to this address.

It follows that on tires 10 of the decoder 9 of a pulse train with a pulse following frequency, decreasing with an increase in the number of a tire with a relative multiplicity factor determined by the content of sensor 1 at the address corresponding to the tire number 10.

It should be noted that the sequence of pulses on the tires 10 will be shifted relative to each other. The pulse frequency on the bus at the corresponding address i can be determined by the formula

F; R / (2-A.D. Kj),

where a is the conversion factor of the counter 2;

i - current address (, 1, ..., А К: - coefficient in ЗУ-1 at address j 5

Claims (1)

F - input frequency (on the bus 7) Frequency grid former containing a clock counter, input 872574 which is connected to the first output of the reference frequency generator, the setup input is connected to the first output of the comparison unit, the first group of inputs of which is connected to the outputs of the clock counter, the second group of inputs of the comparison unit is connected to the outputs of the code sensor, the outputs of the channel number sensor are connected to address outputs  About the inputs of the channel decoder, characterized in that, in order to expand the functionality and increase the reliability of the driver, it additionally includes a memory block, an overflow analyzer, and the channel number sensor is configured as an address counter, the outputs of which are connected to the address inputs of the sensor code and memory block The 20 outputs of which are connected to the information inputs of the clock counter, the outputs of which are connected to the information inputs of the memory, the counting input of the clock counter is connected to the output  the overflow analyzer and the synchronization input of the comparison unit, the reset input of which is connected to the first output of the reference frequency generator and the counting input of the overflow analyzer, the first output of the comparison unit is connected to the gate decoder input of the channel, the second output is connected to the analyzer information input, overflows, the first synchronization input 35 which is connected to the transfer output of the channel number sensor, the second synchronization input of the overflow analyzer is connected to the second output of the driver, the reference frequencies, 40 whose third output is connected to; a clock input of the channel number sensor and a memory block recording input.