SU1261114A1 - Shift-to-digital converter - Google Patents

Abstract

The invention relates to the field of automation and computing and can be used to connect analog information sources with a digital computing device. In order to increase the resolution and noise immunity of the converter, a filter and a series-connected element are introduced into it. EXCLUSIVE OR, differentiating element and reversible counter. From the output of the displacement transducer, pulsed signals arrive at the inputs of the decoder, displaced relative to each other by a quarter of the period following these pulses. The decoder generates a sequence of four pulses, the order of which is determined by the direction of movement. The output pulses of the decoder arrive at the inputs of the triggers, which are triggered with overlapping. The EXCLUSIVE OR element forms successively from the output impulses of the triggers. twice the frequency of the signals compared to the output signals of the trigger. The differentiating cop generates displacement increment pulses that the reversible counter counts. The counting direction is formed by the I-WN element as a single signal when moving in one direction and a zero signal when moving in the other direction. The filter eliminates interference pulses at the output of the element AND-OR, 2 Il. (L

Description

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The invention relates to automation and computing technology and can be used to connect analog information sources with a digital calculator NOT 1m device.

 The purpose of the invention is to increase the resolving power and noise immunity of the converter.

FIG. 1 is a block diagram of a converter; FIG. 2 is a time diagram of its operation.

The converter contains displacement sensor 1, decoder 2, first 3 and second 4 triggers, element 5 4 AND-OR, filter 6, element 7 EXCLUSIVE OR, differentiating element 8, reversible counter 9. Decoder 2 contains inverters 10 and 11, elements 12- 15I.

The Converter operates as follows.

From the output of the sensor 1 to the inputs of the decoder 2 receives pulse signals (Fig. 2a, b), shifted relative to each other. On 1/4 of the period T of the following pulses. Four combinations of decoder 2 input signals are possible: 11.01 J00; 10. Combinations alternate in the forward or reverse order, depending on the direction of movement. Decoder 2 decodes each of the indicated combinations of input signals, and pulses are successively generated at its outputs (FIG. 2 b-e). Triggers 3 and 4 work with overlapping (fit, 2 g, h) from the output signals of the decoder 2. When changing the direction of movement of the order of alternation of the output signals of the flip-flops 3 and 4 is reversed. The output of element 7 generates a sequence of double-frequency signals (Fig.), Compared with the output signals of each of the triggers 3 and 4. Differentiating element 8 generates pulses (Fig. 2n) corresponding to the front and rear edges of the output signals of element 7, which counts reversing account & 9. Direction of counting

five

five

0

five

0

5 0 0

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It is controlled by a 5 4 AND-OR element as a single signal when moving in one direction and as a zero signal when moving in the other direction (Fig. 2i). Filter 6 is designed to eliminate the interference pulses that occur when the logical addition of single signals at the inputs of the element 5.

Thus, when moving, corresponding to one period of the output signal of sensor 1, the output code of the reversible counter 9 changes on the cell of the unit of the least significant bit. When reversing, one pulse, immediately following a change in direction of movement, is not counted. This increases the noise immunity, but when moving in the opposite direction, the output code of the reversible counter 9 is 1 more than the actual code.

Claims (1)

Invention Formula The displacement transducer to the code containing the displacement transducer, the first and second outputs of which are connected to the decoder inputs, the odd outputs of the decoder are connected to the setup inputs of the first trigger, and the even outputs to the setup inputs of the second trigger, the outputs of the decoder are connected to the same input group of the 4I-OR element , another group of inputs of which is connected to the outputs of the triggers, a reversible counter, characterized in that, in order to increase the resolution and noise immunity of the converter, in it s filter and successively connected an exclusive OR and differen1schruyush 1st item, some outputs of the first and second flip-flops are connected to inputs ISKLYUCHAMTSEE OR gate, the output 4I-Hilti element through the filter is connected to the control input of the reversible counter, the counting input of which is connected to the output of the differentiating element. Editor S. Lisin Order 5245/58 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 Compiled by A. Smirnov Tehred I.Popovich Proofreader E. Sirohman