SU1336248A1 - Encoder - Google Patents

Abstract

The invention relates to computing. Its use in various devices for converting and processing digital information allows us to simplify the encoder and expand its scope by encrypting it with any code. The encoder contains registers 1,2, switch 3, 4 clock pulse generator and counter 5. Introduction of counter 6, operating in a code different from counter code 5, encrypts the corresponding bit of the input code. any of the required codes, as well as the change of these codes in the process. 1 il. (L / s OO CD N5 4 00

Description

one

The invention relates to computing in various devices for converting and processing digital information.

The purpose of the invention is to simplify the encoder and expand its scope by encrypting with any code.

The drawing shows a block diagram of the encoder.

The encoder contains the first and second registers 1 and 2, the switch 3, the generator 4 clock pulses, the first and second counters 5 and 6. In the drawing, information inputs 7, control input 8 and outputs 9 are indicated.

The encoder works as follows.

When applying clock pulses from the generator 4 to the counting inputs of the first and second counters 5 and 6, the corresponding code states at the outputs of their bits are sequentially changed. This also shifts the information previously recorded from the inputs to the first register 1 towards the low-order bit.

The information inputs of the second register 2 will receive information from the outputs of the first or second counters 5 and 6, depending on the signal level at control input 8. This is provided by switch 3.

If a logical unit appears at the low-order output of register 1, information from the outputs of switch 3 will be written to register 2.

The first counter 5 may be, for example, binary. The second counter 6 can be any (binary-decimal.

Editor S.Patrusheva Order 4055/56

Compiled by O. Revinsky

Tehred I.Popovich, Proofreader S.Shekmar

Circulation 901 Subscription

VNIIPI State Committee of the USSR

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, st. Project, 4

0

five

6248

2

octal etc.). Since counters 5 and 6 are modified simultaneously, codes of the same states of register 1, but in different representations, will be generated at their outputs. Thus, the outputs of the register 2 will receive information in the codes of the first or second counters 5 and 6 in accordance with the signal at input 8, which can be changed before the start of each information cycle or during operation. This will allow changing the structure of the output code over a wide range.

Claims (1)

Invention Formula The encoder containing the first counter, the outputs of which are connected to the first inputs of the switch, the clock generator, the first and second registers, the information inputs of the first register are information inputs of the encoder, characterized in that, in order to simplify the encoder and expand its application by encrypting by any code, the second counter is entered into the encoder, the outputs of which are connected to the second inputs of the switch, the outputs of which are connected to the information inputs of the second register, the output of the clock generator connected to the pulse counting input of the counter and the input of the first shift register output mpad- Sheha discharge which is connected to the second register write input, the third input switch is a control input of the encoder, the outputs of the second register are outputs of the encoder.