SU1236461A1 - Device for comparing numbers - Google Patents

Abstract

The invention relates to digital computing and can be used as part of information-measuring systems as an information pre-processing unit for extracting extreme values of parameters in the process of measuring them. The purpose of the invention is to expand the field of application of the device by finding extreme values from a sequence of numbers. The device contains a generator, a counter, two shift registers, four AND elements, four flip-flops, two pulse shapers, elements EXCLUSIVE OR, NOT, ISH. The device selects more or less from the sequence of number codes supplied to the input shift register, depending on the selected mode and stores it in the output register. 1 il. to oo o) 4 od

Description

" one

The invention relates to digital computing and can be used as part of information measuring systems as a preprocessing unit for extracting extreme values of parameters in the process of measuring them.

The purpose of the invention is to expand the scope of use by making it possible to compare a sequence of numbers.

The drawing shows a diagram of the device.

The device contains a pulse generator 1, a counter 2, commutation nodes, executed in the form of shift registers 3 and 4, elements AND 5-8, triggers 9-12, a driver of 13 pulses, a controlled driver of 14 pulses, an element EXCLUSIVE OR 15, an element NOT 16, OR element 7.

The device works as follows.

The shift register 4 contains the code of the previous value of the number B, the input of the device {shift register 3 is the code of the current value of the number A. The number of bits in registers 3 and 4 is equal to the number of bits compared to the Mbtx number of n. According to the synchronization signal, the driver of 13 pulses produces the pulse by which code A is written to the shift register 3, zeroes the triggers 9–11, sets trigger 12 to one state. The latter permits the operation of generator I, pulses from the output of which are fed to counter 2 and to the synchronization inputs of shift registers 3 and 4. These pulses conduct a synchronous shift to the right of information

but, ",,

b and b, b ,, ..., b

Number codes from the high-order outputs (“, bjj) are fed to the elements EXCLUSIVE OR 15, the elements AND 5 and 6, to the inputs of the lower bits of registers 3 and 4, respectively, to enter information again, starting with the highest bits. In case of inequality of bits E / B, the signal from the output of the EXTENDING OR} 5 element translates .trigger 9 into one state and the signal difference from O to I at the output of trigger 9 records information from the outputs of the And 5 and 6 elements into triggers 10 and P. Thus, the single state at the output of Trig 36646

Gera 10 appears in the case of a-h, a single state at the output of the trigger 11 - in the case, in the case of the outputs of the triggers 10, I

zero state. With a single 5

the state of

the input of the ban from the unit 14 a single state is given in the case. J, in the zero state, on the input JQ, the choice of the mode is given in the case db

After that, as the generator 1 generates 11 pulses, the transfer signal of the counter 2 zeroes the trigger 12

jr and generator 1 stops generating pulses, while codes A and B are fixed again in shift registers 3 and 4. The transfer signal of counter 2 is also input.

2 ,. pulse generator 14 and in the absence of a single signal at the inhibit input of driver 14, a write signal is generated to the shift register 4, in which 25 the current value code A is overwritten and the cycle is repeated with the new current value code. In case of a ban, the rewrite is not

occurs in the shift register 4 remains either maximum (in the case of

35

40

thirty

S5

unit state on the control input of the device mode selection),, or the minimum (in the zero state on the mode selection input) number.

A single state at the outputs of the flip-flops 0 or P can be set only once per cycle from the h-generator pulses, since resetting the flip-flop 9 is possible only with a clock from the generator 13. The number of pulses in the cycle is equal to the number of digits of the numbers being compared {number of bits Shift registers 3 and 4),

Claims (1)

Invention Formula A device for comparing numbers containing a pulse generator, the output of which is connected to the counter input of the counter, the first and second elements AND, the outputs of which are connected to the information inputs of the first and second triggers, respectively, the element EXCLUSIVE OR, the output of which is connected to the first inputs of the first and second elements AND , elements NOT and OR, the third trigger. 3 the first and second switching nodes, while the output of the first switching node is connected to the first input of the EXCLUSIVE OR element and the second input of the first AND element, and the output of the second switching node is connected to the second inputs of the EXCLUSIVE OR element and the second AND element, information inputs of the first node of the secondary hub informational inputs of the device, characterized in that, in order to expand the scope of application by providing the possibility of comparing a sequence of numbers, the first and second switching nodes are made as first o and the second shift registers, the most significant bits of which are output-t4K, respectively, of the first and second switching nodes, the third and fourth elements AND, the fourth trigger, the pulse shaper, the control pulse shaper, are additionally introduced into the device; the device sync input, and the output - with the installation inputs in O of the first, second and third flip-flops, with the recording input of the first shift register and the installation input at the 1st fourth flip-flop, the output of which is n to the input zapus 4614 pulse generator, the output of which is connected to the synchronization inputs of the first and second shift registers, the higher-order outputs of which are respectively connected to the lower-order inputs of the same registers, and the information outputs of the first shift register are connected to the information inputs of the second shift register, information outputs which are the outputs of the device, the recording input of the second shift register is connected to the output of the controlled imaging unit - pulses, the information input of which is connected n with the transfer output of the counter and the installation input into the fourth trigger, the inhibit input of the controlled pulse generator is connected to the output of the OR element whose first and second inputs are connected to the outputs of the third and fourth elements AND, respectively, the first inputs of which are connected respectively to the outputs the first and second triggers, the synchronization inputs of which are connected to the input of the third trigger, the device mode selection input is connected to the second input of the fourth element - And through the element NOT to the second input of the third el Yementa I. Editor N. Gunko Compiled by A. Aleksandrov Tehred M.Hodanich Order 3091/51 Circulation 671 Subscription VNIIPI State Committee GCCP for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 Proofreader V.Vut ha