SU1249007A1 - Device for producing sequence of natural numbers in fibonacci p-code - Google Patents

Abstract

The invention relates to computing and is intended to generate a sequence of. numerical numbers in the Fibonacci p-code in the devices for receiving and processing digital information. The aim of the invention is to improve the speed - the generator is made on (p + 1) scaling nodes. The advantage of the device is the execution of scaling nodes on the G-triggers and new connections between the scaling nodes. Each scoring node contains three Z-flip-flops, an element 4И-ЗИ-2ИЛИ- - NOT and an element NOT. 3 il. | sl with ts9 4 "

Description

The invention relates to an efficient technology: ike n is intended to generate a sequence of natural numbers in the p-Fibonacci code

The purpose of the invention is to increase the efficiency of

KA of FIG. 1 is a functional diagram of an apparatus for generating a sequence of natural numbers with an E p Fibonacci code; in fig. 2- electrical schematic diagram

scoring unit; in fig.

temporary diagram of the device.

The device (figo 1) contains (p 4-1) recalculating nodes 1 ,, Each recalculating node (FIG. 2) contains three HC-flip-flops 2-4, element 4I-3 and 1 SH1 NOT 5 and element 6.

The device for the case of p 1 works in the following way.

In the initial state, all the Z-triggers of the scaling node concentrates zero by sending a signal from the external circuit to the WX control inputs. A signal Log, 1 from the blocking output of the second scaling node is present at the output of the blocking transfer of the first non-singular node (FIG. For.) To the input of the first Perez-clear node 1, its IK-trigger 2 is set to the state of Logo 1 (FIG. 3B). since on its I- and inputs there are signals from the Log, 1% coming from the inverse output of TK-trigger 3. This same pulse is recorded in the 1K-trigger 3 (Fig. 3), since The second 1 input is a signal. Log О ,, supplied from the direct output of the 1К-trigger 2о. and on the K-inputs there are signals of the 1% Log feed. from the inverse output of the 1K-flip-flop 2 to the second K-in and from the inverse output of the IK-flip-flop 4 to the first and third K-inputs. 1K Trig - Ger 4 is in the storage mode of the previous state (FIG, Zg), since its second 1-input and the third K input have signals. Log 0% supplied respectively from the direct output 1K-trigger 3 and s direct output of 1K flip-flop 2. At the output of the device, code 000 001 appears.

When the second synchro1-1m pulse appears (Fig. 3a), the signal levels at the I and K inputs of the 1K trigger 2 correspond to the state of the Log. 1 so he switches to the opposite

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state in the state of Logo O (Fig. 36). As in the previous cycle, the 1K-trigger 2 was in the Log state. 1 ,, 1K-trigger 4 - in the state of the Log O and 1-inputs of the IK-trigger 3 there were signals of the Log. G ,, and on the second K-input - the signal. Log. supplied from the inverse output of the trigger 2, then in the IK-trigger 3 a unit will be written (Fig. Sv) 1K - the trigger 4 will not change its state (Fig. Zg) J since it is in recording mode zero by the presence of the Log signal. 1 at its K-inputs supplied: respectively from the direct output of the 1K-flip-flop 2; from the inverse output of TK-flip-flop 3 and from the input of blocking transfer of the scaling node, and signal-log, about its second X-input supplied from the direct output of 1K-flip-flop 3 At the output of the device, the code 000 010 .

Before the arrival of the third synchro pulsation, the I and K inputs of the IK trigger 2 contain signals O from the inverse output of the IK trigger 3. The K inputs 1K trigger 3 have Log signals. G served accordingly with inverse

output 1K-flip-flop 2 and from the inverse output 1K flip-flop 4, and at the 1-input - F-flip-flop 3 - signal Log. O, supplied from the direct output of the IK-flip-flop 2. At the 1-inputs of the 1K-flip-flop 4 there are signals Log, 1, after-T5 pa11ie respectively from the inverse. output 1K - flip-flop 2, from the direct output of GK-flip-flop 3 and from the output of blocking transfer of the scaling node, and the third K-input of the 1K-flip-flop 4 contains a Log signal. Oh, I entered W.1-1Y from the direct output of 1K flip-flop 2. Thus, 1K-flip-flop 2 is in the storage mode of the previous state (Fig. 3B) 5 1K-flip-flop 3 - in write-mode Zero Sv), and IK-trigger 4 - in the recording mode of the unit (Fig. Zg) S, therefore the third clock pulse (Fig. Za) sets to

device output code 000 100s

Before the arrival of the fourth clock pulse, the 1K flip-flop 2 is located. in the counting mode, due to the presence of the Log signal. 1 at its I- and K-inputs coming from the inverse output 1K of the trigger 3, 1K-trigger 3 is in the storage mode of the previous condition S due

Signal signal On its second 1-input coming from the direct output of 1K-flip-flop 2, and on its first AND third K-inputs coming from the inverse output of 1K-flip-flop 4. 1K-flip-flop 4 is also in the storage mode of the previous state (Fig. 3g), due to the presence of signals Log. About at its third K-input coming from the direct output of the 1K-flip-flop 2 and at its second 1-input from the direct output of the 1K-flip-flop 3.

 Thus, the fourth clock pulse changes the state of only 1K flip-flop 2 (Fig. 36). At the output of the device According to Wits code 000 101.

Before the arrival of the fifth sync pulse (Fig. Za), the triggers of the first scaling node are in the following modes: 1K-trigger 2 in the counting mode (Fig. 36); 1K-trigger 3 in the storage mode of the previous state (Fig. Sv); 1K-trigger 4 in the recording mode zero (Fig. Zg).

On the second, third and fourth inputs of element 4I-ZI-OR-NOT 5 there are Log signals. 1, supplied respectively from the direct output of the 1K-flip-flop 4, from the direct output of the--flip-flop 2 and from the transfer blocking input of the scaling node. Thus, the fifth sync pulse will set all 1K-triggers of the first recalculation node to the initial state, and through the first input of the 4I-ZI-OR-NO 5 element from the transfer output of the first recalculation node go to the information input of the second recalculation node (FIG. Rear). In this case, the 1K-trigger 2 of the second scaling node is set to one state (Fig. Ze). The output of the device is Vits code 001 000. At the same time, at the output of the blocking transfer of the second recalculated node, the signal Log. O, arriving at the entrance of the blocking transfer of the first conversion unit.

The sixth sync pulse sets the 1K triggers of the first scaling node to the following states: IK trigger 2 to Log. The 1K triggers 3 and 4 do not change their state.

At the output of the device according to Vits code 001 001.

The seventh clock sets 1K-triggers of the first recalculated

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15

20 25

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0

five

node in the following states: 1K-trigger 2 to the state Log. O, 1K-trigger 3 to the state Log. The 1K-trigger 4 will not change its state.

At the output of the device according to Vits code 001 010.

In this state, on the fifth and sixth inputs of element 4И-ЗИ-Ш1И-НЕ 5 of the first recalculating node there are Log signals. 1, fed respectively from the direct output of the 1K flip-flop 3 and from the output of the HE element 6.

Before the arrival of the eighth sync pulse, the 1K triggers of the first counting node are in the following modes: 1K trigger 2 in the previous state storage mode; 1K-trig- - ger 3 in the recording mode zero; 1K-trigger 4 in the storage mode of the previous state, due to the presence of the Log signal. About on its .third I- and first K-inputs supplied to the input of the blocking transfer from the second scaling node. Thus, the eighth sync pulse (FIG. Za) will set all 1K-triggers of the first scaling node to the initial state and through the seventh input of the 4I-ZI-OR-NO element 5 from the transfer output of the first scaling node go to the information input of the second scaling node . At the exit of the device. is repeated as described (Fig. 3) until the appearance of 101 010 by the twentieth sync pulse. The next twenty first clock pulse sets all the triggers of all the scaling nodes to the 000 000 state and the device is reset.

Claims (1)

Invention Formula A device for forming a sequence of natural numbers in the p-Fibonacci code containing counting nodes, the information input of the first counting node being the information input of the device, the reset inputs of all counting nodes are combined and connected to the reset input of the device; You need it so that, in order to increase speed, each scaling node contains three 1K-triggers, an AI-ZI-IPI-NE element and a NOT element, and the reset inputs of the trigger are combined and connected to the reset input of the scaling node, odes of trigger synchronization and the first inputs of the first and second groups of inputs of the 4I-ZI-OR-NO element are combined and connected to the information input of the counter, the 1- and K-inputs of the first trigger and the second K-input of the third trigger are connected to the inverse output of the second trigger, the first and third I- and K-inputs of which are connected to the inverse output of the third trigger, the direct output of which is connected to the second input of the first group of inputs of the 4I-ZI element - OR-NOT; the direct output of the first trigger is connected to the third 1-input of the second trigger, third K-in the third trigger and the third input of the first group of inputs of the 4I-ZI-OR-NOT element, the second K-input of the second trigger and the first 1-input of the third trigger are connected to the inverse output of the first trigger, which is the output of the tit a scaling node whose cascading resolution is connected to the fourth input of the first group the inputs of the 4I-ZI-OR-NOT element, the input of the NO element, the first third trigger and the second 1-input of the third trigger, the second 1-input of which is the second input of the second group of inputs element 4I-ZI-OR-NOT are connected to the direct output of the second trigger, the output of the element is NOT connected to the third input of the second group of inputs of the element 4Y-ZI-OR-NO, the output of which is the cascade output of the recalculation node, the forward outputs of the triggers are the information outputs of the recalculation node, the information input of the i + 1th recalculation node connected to the cascade output i-ro (.., p + 1) of the enumeration node, the cascading enable input of which is connected to the transfer output of the i + l-ro peccount node. t t t  T g j five , / / I I and I I I I I I and I I I and I I M e x 3 Or S. Patrushev 4196/24 Compiled by S. Kurosh Tehred G.G.r.ber. Corrector A Circulation 343 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 Proofreader A. T sko