SU1422181A1 - Digital phase meter - Google Patents

Abstract

The invention can be used in devices for measuring phase shift. The purpose of the invention is to increase - accuracy. The goal is achieved with the exception of phase-amplitude error introduced by the variable component of the temperature of pn-junctions of tunnel diodes included in switching elements 3 and 4. With the help of adders 12,13, D-flip-flops. 14, 15, inverting keys 16, 17, divider I8 into two, and element 19, the switching of the diode diodes to the upstream branch of the characteristic takes place after one period of the quantizing frequency. At the same time, the average power does not change during the period of the input signal and the temperature of the pn junctions remains constant. The phase meter also contains matching blocks 1 and 2, current switches 5 and 6, generator 7 of quantizing pulses, the element SPARE OR 9, the element AND 10, the counter 11, the time master unit 8. 1 Cp. f-ly, 4 ill. (O S /)

Description

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The invention relates to a radio metering technique and can be used in the construction of digital phase meters designed to measure the phase shift of harmonic signals in a wide frequency range.

The purpose of the invention is to improve the accuracy of phase shift measurement.

FIG. 1 shows a block diagram of a digital phase meter; in fig. 2 voltage plots explaining the principle of operation of the phase meter; in fig. 3 - functional diagram of the switching element; in fig. 4 - functional inverting key scheme.

The digital phase meter contains two soldering units 1 and 2, two switching elements 3 and 4, two current switches 5 and 6, a generator of 7 quantum pulses, a time master unit 8, and an EXCLUSIVE element. I.PI 9, element I 10, counter 11, the first inputs of switching elements 3 and 4 are connected to the forward generator output 7 of quantizing pulses, and their outputs to the inputs of current switches 5 and 6, the output time of master unit 8 is connected to the first input element 10 whose output is connected to the input of the counter 1I, as well as two adders 12 and 13, two D-flip-flops 14 and 15, two inverting keys 16 and 17, frequency divider 18 by two, an additional element And 19 connected by the first input to element EXCLUSIVE OR 9, and the second - to the synchronization inputs of D-flip-flops 14 and 15, controlling the moves of the inverting keys 16 and 17 to the input are the time of the master unit 8 and to the output of the frequency divider 18 by two, the output of the additional element And 19 is connected to the input of the element And 10, the outputs of matching blocks 1 and 2 to the first inputs of the summer 12 and 13 The outputs of which are connected to the signal inputs of the switching elements 3 and 4, the outputs of the current switches 5 and 6 are connected to the D inputs of the D-flip-flops 14 and 15, and the outputs of the B-triggers are connected to the inputs of the inverting keys 16 and 17 and the inputs of the EXCLUSIVE OR elements , investor output of the generator 7 quantizing pulses It is not connected with the second inputs of switching elements 3 and 4, and the logical output of the generator 7 quantizing pulses is connected to frequency divider 18 by two, the outputs are inverting

keys 16 and 17 are connected to the second inputs of adders 12 and 13, in addition, the inverting key (Fig. 4) contains an inverter 20, second and third additional elements 21 and 22, and 23 and 24 keys, and the first inputs of elements 21 and 22 are connected to the control input of the inverting keys 16 and 17, the input of the inverter 20 is connected to the second input of the element AND 21 and the input of the inverting key 16 (17), the output of the inverter 20 is connected to the second input of the element 22, the output of the element 21 is connected to to the input of the first key 23, the information input of which is connected to the source of the den the voltage of the output element And 22 is connected to the control input of the second key 24, the information input of which is connected to a positive voltage source, the outputs of the keys 23 and 24 are combined and connected to the output of the inverting key 16 (17), switching element 3 ( 4) contains tunnel diodes 25 and 26, and the anode of tunnel diode 26 is connected to the cathode of tunnel diode 25, this point is the signal input of switching element 3 (4) and its output simultaneously. The anode of the tunnel diode 25 is the first inlet of switching element 3 (4). The cathode of the tunnel diode 26 is the second input of the switching element 3 (4).

Phase meter works as follows.

Consider the operation of a single channel signal formation. The input sine wave signal (Fig. 2a) is fed to matching unit 1, which can be implemented as an emitter follower. Next, the signal arrives at the adder 12, for example resistive, and from it to the switching element 3. From the generator 7 of quantizing pulses, positive and negative pulses are received at the inputs of the switching element 3 (Fig. 26, c). The switching element 3 is made in the form of a pair of series-connected tunnel diodes 25 and 26 (Fig. 3) with a pulse power supply (Goto pairs). Under the influence of the negative half-wave. the diode 25 is switched on the edge of the pulsed power supply, and the diode 26, with a positive half-wave, switches.

This pair of goto is converted by the current key 5 into standard logic levels. Current switch 5 is a fast-acting amplifier. D-flip-flop 14 reads the signal from the current key 5 on the front of the pulses coming from the frequency divider 18 by two. This reading occurs at the moment of time preceding the end of the pulse from the current switch 5, since the total delay of the switching element 3 and the current switch 5 is more than the delay of the frequency divider 18 by two. The signal read by the D-trigger 14 (Fig. 2k) is fed to the input of the inverting key 16. The latter works as follows.

When the frequency divider 18 is two by two, the control input of the inverting key 16 receives a logical O, the key 16 is closed, there is no voltage at its output (Fig. 2L) and the input signal passes through the adder 12 without change. In the case of a logical 1 at the control input, the inverting switch 16 produces a voltage opposite in sign to the input, larger in magnitude than the maximum input signal. This arrangement enters the adder 12 and adds to the input signal. At the output of the adder 12, a voltage appears (Fig. 2e), opposite to the sign of the input signal, - this causes the switching element 3 to pass to the state opposite to the previous one (Fig. 2e). This state is not read by the D-trigger 14, since this instant of time corresponds to the cutoff of the pulse from the frequency divider J8 by two.

The switching element 3 every second period of the quantizing frequency passes to the state opposite to the previous one (Fig. 2e), i.e. each tunnel diode 25 and 26 switches to the second upstream branch of the characteristic after one period of the quantizing frequency. In this case, the average power dissipated in diodes 25 and 26 does not change during the period of the input signal. The temperature of the pn junctions remains constant.

| Since the thermal constant of pnp transition time is much longer than the period of quantizing pulses. Thus, the phase amplitude error is eliminated.

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the variable component of the temperature of the pn junctions of the tunnel diodes 25 and 26. The signal shaping channel, consisting of the matching unit 2, the adder 13, the switching element 4, the current switch 6, the D-flip-flop 15 and the inverting switch 17, works similarly. The signals from the outputs of D-flip-flops 14 and 15 are fed to the inputs of the SPARE OR 9 element, which forms the Internet) - time shafts, the duration of which is proportional to the phase shift between the input signals. The additional element And 19 performs the quantization of the time interval. The timing unit 8 may be implemented as a serial connection of a pulse counter and a trigger. The measurement time pulses from the output of the time of the master unit 8 control the passage of the counting pulses from the additional element AND 19 through the element 10 to the counter P. The number of pulses recorded by the counter II,

N where t

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the measurement time, t is the period of the frequency produced by the frequency divider 18 by two;

Vo measured phase shift. If 18-10, where n I, 2,3, ..., then NI / corresponds to the measured phase shift in degrees (n 1) or fractions of a degree in the decimal system.

The inverting key works as follows.

If the control input is logical O, the output of the elements And 21, 22 is also logical O, the keys 23 and 24 are closed and there is no voltage at the output of the inverting key. If the control input is logical. J and the input of the Inventor 20 are also logical J, the key 23 is also open at the output of the inverting key, a negative voltage. If the input of the inverter 20 is logical O, the switch 24 is open and a positive voltage is passed to the output.

Thus, the use of new elements, namely: two adders, two D-flip-flops, two inverting keys, an additional element. ment I and frequency divider by two with

By appropriate connections, it is possible to eliminate the component of the phase-amplitude error due to the variable component of the temperature of p – n junctions of tunneling diodes, and, in general, to improve the accuracy of phase shift measurement.

F o rm ula invention

Claims (2)

1. A digital phase meter containing two matching blocks, two switching elements, two current switches, a generator of quantizing pulses, a time master unit, an EXCLUSIVE OR element, an And element, a counter, the first inputs of the switching elements are connected to the direct output of the quantizing pulses their outputs are with the current switch inputs, the time output of the driver unit is connected to the first input of the element I, the output of which is connected to the input of the meter, which, in order to improve the accuracy of phase shift measurement, is provided with two silencers, two D-triggers, two inverting keys, a frequency divider by two, an additional element AND connected to the first input with the output of the EXCLUSIVE OR element, and the second to the synchronization inputs of the D-triggers controlling input of the inverting keys, with the input of the master block and the output of the frequency divider into two, and the output of the additional element And is connected to the input of the element And, the outputs of the matching blocks are connected to the first inputs of adders, the outputs of which connected to the signal inputs of the switching elements, the outputs of the current switches are connected to the D-inputs of the B-flip-flops, and the outputs of the D-flip-flops are connected to the inputs of the inverting keys, and the inputs of the STARTING element of the quantizing pulses connected to the second inputs of the switching elements the logical output of the Quantizing Pulse Generator is connected to the input of the frequency divider by two, and the outputs of the inverting keys are connected respectively to the inputs of the adders, 2. Phase meter according to claim 1, distinguished by the fact that the inverting key contains an inverter, the second and third additional elements are And two keys, the first inputs of the elements And are connected to each other and to the control input of the inverting key The input of the inverter is connected to the second input of the second additional. element and input of the inverter key inverter output of the inverter. connected to the second input of the third additional element and output / b of the additional additional element and connected to the control input of the first key, whose information input is connected to the source of the negative voltage, connected to the control input of the second key, the information input of which is connected to the source of positive voltage, the outputs of the keys are combined and connected to the output of the inverting key. a 6 6 g Lj lj f f ( Figg ag.Z ) Editor I.: Gorna Compiled by M. Katanova Tehred L.OliNyk Proofreader A.Obruchar Order 4427/46 Circulation 772 VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 f2fJJ) ig. Subscription