SU1202039A1 - Differential generator of pseudorandom pulses - Google Patents

Abstract

The invention relates to a pulse technique and, in particular, to devices for generating pseudo-random pulses. The purpose of the invention is to increase the accuracy of forming a differential flow of ntf pulses. The differential pseudo-random pulse generator contains a clock pulse generator, two pulse sequence generators, a key block and a logic element (LE) I. The goal is achieved by introducing into the device of the third generator the M-sequence of three triggers, four delay elements, one LE and SH, circuits compare and wait for generation. ra pulses. The operation of the device is explained according to the block diagram and (L time diagrams in the description of the invention. 2 Il.

Description

to

about to

about with

The invention relates to a pulse technique.

The aim of the invention is to improve the accuracy of forming a differential flow of pulses.

FIG. 1 shows a block diagram of a differential pseudo-random pulse generator; in fig. 2 - time diagrams of his work.

Differential pseudo-random pulse generator (Fig. 1) co. holds the generator i clock pulses, the output of which is connected to the inputs of the first 2 and second 3 generators-. Ifr-series tori tori, block 4 keys, third generator 5 M-sequences, first 6, second 7 and third 8 triggers j first 9, second 10, third 11 and fourth 12 delay elements, first 13 and second 14 elements AND, element OR 15 scheme

16 comparison, waiting generator 17 pulses, waiting generator output

17 pulses connected to the input of the fourth delay element 12 and the input of the third generator 5 No.-sequence, the outputs of which are connected to the inputs of the element OR 15, the first

, howl group of inputs of the circuit 16 compared, and the inputs of the block 4 keys, outputs. which is connected to the inputs of the second generator 3 -sequence, the group of outputs of which is connected to the second group of inputs of the comparison circuit 16, the output of which is connected to the first input of the first element And 13, the output of which is connected to the first input of the third flip-flop 8, the output of which is connected to the input -the generator of 17 pulses. The second input of the third trigger 8 is connected to the control input of the key block 4 and the output of the second element. And 14, the first input of which is connected to the output of the fourth delay element 12. The second input of the second element And 14 is connected to the output of the OR element 15, the speed of the first generator 2 of No.-sequence is connected to the first input of the first trigger 6, the second input of which is connected to the output Oscillator 1 clock, the first input of the second trigger 7 and through the first delay element 9 with the second input of the first element And 13. The output of the first trigger 6 is connected to the third input of the first trigger through the delay element 11. The output of the second generator 3 M-after ovatelnos tee connected to a second input of the second flip-flop 7, the output of which through a second delay element 10 is connected to the third input of flip-flop 7 vtorogst.

The differential pseudo-random pulse generator (Fig. 1J works, melts as follows.

In the initial state (other than 00 ... O), the generators of 2,3,5 M-sequences are set by an external signal (for example, from the initial setup scheme).

The pulses of the clock generator (Fig. 2a) arrive at the synchronization input of the 2-M generator, a sequence at the output of which pseudo-random logical states (Fig. 26) are formed, arriving at the first input of the trigger 6. The second input of the trigger 6 receives the pulses of the generator 1 clock pulses (Fig. 2a), therefore, from each logical 1 at the output of the {-sequence generator at the output of the trigger 6 with a delay of one cycle also appears logical 1, which through the delay element 11 enters its third input and returns trigger 6 is reset. Thus, at the output of the trigger 6, pulses are generated, the duration of which is determined by the element of the plug-in support 11, arriving at the first output of the device (Fig. 2c). Each pulse corresponds to the presence of a logical 1 at the output of the 2 M-sequence generator in the previous cycle The volume of non-repeating pulse combinations at this output of the device corresponds to the length of the sequence produced by the 2 M-sequence generator.

The pulses of the oscillator 1 clock pulses (Fig. 2a) also arrive at the synchronization input of the generator 3 of the sequence, the output of which produces pseudo-random logical states (Fig. 2d) arriving at the second input of the trigger 7. At the first input of the trigger 7, the pulses of the clock generator I impulses (Fig. 2a), therefore, from each logical 1 at the output of the M-sequence generator, at the output of the trigger 7 with a delay of one cycle, logical 1 also appears, which through the delay element 10 enters its third input and trigter 7 rotates in Noe starting state. Thus, at the output of the trigger 7, pulses are generated, the duration of which is determined by the delay element 10 ,. the devices arriving at the second output (Fig. 2d), each of which corresponds to the presence of a logical 1 at the output of the generator 3 M-sequence. The length of a sequence of logical states generated by a 3 M-sequence generator is substantially less than the length of a sequence of logical states produced by a 2-sequence generator. The signals from the bit outputs of the 3 M-sequence generator are fed to the second group of inputs of the comparison circuit 16, to the first group of inputs of which signals are received from the bit outputs of the 5 M-sequence generator. Since the state of the 3 M-sequence generator periodically changes, and the state of the 5 M-sequence generator remains unchanged, c. some instant of time the states of both generators coincide and the logical circuit 1 is developed at the output of the comparison circuit 16 (Fig. 2e), which is fed to the first input of the And 13 element. Since the output of the delay element 9 to the second input of the And 13 element is a pulse of the oscillator 1 clock pulses, the output of the element And 13 is formed logical 1, which is fed to the first input of the trigger 8 and sets it to the zero state (fi 2g). The signal from the output of the trigger 8 is fed to the control input of the waiting generator 17 pulses and starts it. The first impulse with. The output of the standby generator — 17 pulses (Fig. 2h) is fed to the sync input of the 5th n-sequence generator and changes its state. If, after changing the state of the 5-sequence, all its outputs connected to the inputs of the OR 15 output are simultaneously set to logical O, then the output of the OR 15 also sets the logical O (Fig. 2i), therefore the POT pulse delayed by the delay element 12 is element and 14 does not pass. B. In this case, one of the subsequent pulses produced by the waiting pulse generator 17 transfers the 5 M-sequence generator to such a state that the logical 1 is set at the output of the OR I5 element (Fig. 2i) arriving at the second input of the AND 14 element. This the same pulse through the delay element 12 and the element And 14 is fed to the second input of the trigger Vi. sets it into a single state: (Fig. 2g), and also blocks the waiting generator p 17 pulses. In addition, the same pulse from the output of the AND-14 element is fed to the control input of the 4 key block, opens them and, through the installation inputs, sets a new, random state for it in the 3-sequence. (Fig. 2k). After performing these operations as the pulses arrive; From the clock generator 1 (Fig. 2a), the state of the 3-sequence generator changes (Fig. 2d) and the pulses arrive at the outputs of the device (Fig. 2c, d). After passing through all the states, the 3 M-sequence generator is again in the state specified during the last rewriting of information from the No-sequence generator 5 into it. In this case, the comparison circuit 16 (Fig. 2e) is triggered, the trigger 8 is transferred to the zero state (Fig. 2g), the pulses of the pulse generator 17 (Fig. 2h) are shifted. In the No.-sequence generator 5, this number is repeated ( for example, one) that on: the inputs of the key block 5 a new logical state is set, different from zero and also random with respect to the state of the 3 generator of the M-sequence, which is rewritten into the sequence number generator 3 and is the initial state for but a new cycle of shifts. Thus, a new cycle of shifts in the generator of the 3-sequence begins with a new, random state for it, despite the fact that in the second state of reHepatOpia 5 of the No. Sequence, the state that occurred at the second output of the flow device repeats. The formula and 3 about the differential Differential pseudo random pulse generator, containing a clock pulse generator, the output of which is connected to the inputs of the first and second M-sequence generator, key block, the first AND element, characterized in that improve the accuracy of the formation of the differential pulse flow; it contains the third generator of the M-sequence, the first, second, third triggers of the first, second, third and fourth delay elements, the second element AND, the OR element, the comparison circuit, the waiting generator and The pulses, the output of which is connected to the input of the fourth element of the bottom and the input of the third generator of the M-sequence, the outputs of which are connected to the inputs of the OR element, the first group of inputs of the comparison circuit and the inputs of the key block, the outputs of which are connected to the inputs of the second generator - sequence, group of outputs which is connected to the second group of inlets of the comparison circuit, in the course of which is connected to the first input of the first element I, the output of which is connected to the first input of the three. the second trigger, the output of which is connected to the input of the waiting pulse generator, the second one. The input of the third trigger is connected to the input, control of the key block and the output of the second one. element I, the first input of which is connected to the code of the fourth delay element, the second input of the second element AND connected to the output of the element OR, the output of the first generator of the M-sequence is connected to the first input of the first trigger, the second input of which is connected to the output of the clock generator, the first input the second trigger and through the first delay element with the second input of the first element And the output of the first trigger. connected to the third input of the first trigger through the third delay element, the output of the second generator M-sequence It is connected to the second input of the second trigger, the output of which through the second delay element is connected to the third input of the second trigger. . . .

/ l-m- - W g M

“Av iocso b,

Claims (1)

Claim Differential pseudo-random generator. a pulse generator, comprising a clock generator, the output of which is connected to the inputs of the first and second generator of the M-sequence, a key block, the first element And, characterized in that, in order to increase the accuracy of the formation of the differential pulse stream, it contains a third generator of the M-sequence , first, second, third triggers ₍ first, second, third and fourth delay elements, second AND element, OR element, comparison circuit, a waiting pulse generator, the output of which is connected to the input of the fourth delay element the input of the third generator of the M-sequence, the outputs of which are connected to the inputs of the OR element, the first group of inputs of the comparison circuit and the inputs of the key block, the outputs of which are connected to the inputs of the second generator of the ^ -sequence, the group of outputs of which is connected to the second group of inputs of the comparison circuit, the first · input - AND, the output of which · the course of which is connected to the house of the first element of the horn is connected to the first input of the tre. tego trigger whose output soe- _v of the connections to the input of monostable pulse generator ,, the second, the third input 'connected to the trigger input kdyuchey .No open and the outlet of the second block. element And, the first input of which is connected to the output of the fourth delay element, the second input of the second element And is connected to the output of the OR element, the output of the first M-sequence generator is connected to the first input of the first trigger, the second input of which is connected to the output of the clock generator, the first input of the second trigger and through the first delay element with the second input of the first element And, the output of the first trigger is connected to the third input of the first trigger through the third delay element, the output of the second generator M The device is connected to the second input of the second trigger, the output of which through the second delay element is connected to the third input of the second trigger. FIG. 2 ^nil