SU1264316A1 - Code generator - Google Patents

Abstract

The invention relates to a pulse technique. The purpose of the invention — improving noise immunity and extending the functionality of the code generator — is achieved by generating codes to obtain all of the M-sequence signals. For this purpose, parallel register 5 and shift register 6 are additionally entered into the code generator. In addition, the shaper contains a generator of 1 clock pulses, a generator of 2M-sequences, a counter 3, a decoder 4, an element of the BAN 7, a bus 8 for specifying constant coefficients. The device provides the formation of shifted copies of M-sequences and can be used in syn- chronization devices of broadband radios. 1 il. (L O)

Description

The invention relates to a pulse technique.

The purpose of the invention is improving noise immunity and expanding the functionality of the code generator by ensuring the formation of codes to obtain all shifts of the sequence.

The drawing shows a functional diagram of the code generator.

The code generator comprises a clock generator 1, an M-sequence generator 2, a counter 3, a decoder 4, a parallel register .5, a shift register 6, an element BAN 7, a constant coefficient setting bus 8 connected to the information inputs of the counter 3, the output of which is connected to the second the input of the element is PROHIBITED 7 and the synchronization input of the parallel register 5, the inputs of which are connected to the corresponding inputs of the decoder 4 and the corresponding outputs of the bits of the generator of the 2 M-sequence, the output corresponds to • *. The corresponding discharge of which is connected to the second input of the shift register 6, the first input of which is connected to the input of the 2 M-sequence generator, the output of the clock generator 1 and the third input, of the element BAN 7, the output of which is connected to the input of the counter 3, the output of the decoder 4 is connected to the first input of the element is PROHIBITED 7.

The code generator operates as follows.

When the discharges of the generator of the 2 M-sequence are set to the state 100 ... 0, the level 1 appears at the output of the decoder 4, which goes to the first input of the FORBID element 7. Pulses from the output of the generator 1 of clock pulses from the next clock cycle begin to flow through the element FORBID 7 the input of the counter 3, which begins to subtract their number from the number written to it on the bus 8 job constant coefficients. When the counter 3 reaches the state 000 ... 0, a pulse appears at its output, which enters the second input of the BAN 7 element and closes it for the passage of clock pulses from the output of the clock generator 1. The same pulse from the output of counter 3 rewrites the state of the bits of the generator 2M - after

1264316 2 sequences in parallel register 5. These states are codes according to which it is necessary to sum the shifts of the M-sequence from the outputs of shift register 6 to obtain the desired shift. The pulse from the output of the counter 3 also records on its information inputs the codes supplied to them via the bus 8 for setting constant coefficients and providing the corresponding shift of the M-sequence. The code generator operates in dynamic mode and generates cyclic shifts of the M-sequence at the outputs of the shift register 6, and coefficients determining the topology of the relation between the bits of the shift register and the adder modulo two at the outputs of the parallel register 5 to obtain the required shift of the copy of the M-sequence. The research generator contains a circuit for detecting a forbidden state.

Claims (1)

The invention relates to a pulse technique. The purpose of the invention is to improve the noise immunity and enhance the functionality of the code generator by enabling the generation of codes to obtain all sequence shifts. The drawing shows a functional diagram of the code generator. The code generator contains 1 clock pulse generator, 2 M-sequence generator, counter 3, decoder 4, parallel register, 5, register 6, offset, the element BAN 7 bus 8, which sets constant coefficients, connected to the information inputs of counter 3, the output of which connected to the second input of the BANCH element 7 and the synchronization input of the parallel register 5, the inputs of which are connected to the corresponding inputs of the decoder 4 and the corresponding outputs of the generator bits 2 M - the sequence corresponding to p The voltage of which is connected to the second input of the shift register 6, the first input of which is connected to the input of the 2M generator, the output of the clock generator 1 and the third input of the BAN 7, the output of which is connected to the input of the counter 3, the output of the decoder 4 is connected to the first the input element of the ban. 7. The shaper codes works as follows. When setting the bits of the generator 2 M-sequence to the state 100 ... O, the output of the decoder 4 appears level I, which enters the first input of the element BANCH 7. The pulses from the output of the generator 1 clock pulses from the next clock cycle begin to flow through the element PROHIBITION 7 to the input of counter 3, which begins to subtract their number From the number recorded in it through the bus 8 sets of constant coefficients. When the counter reaches state 3,000 ... O, a pulse appears at its output, which arrives at the second input of the BANCH 7 element and closes it for the passage of clock pulses from the generator 1 clock pulse. The same pulse from the output of counter 3 rewrites the state of the generator bits of the 2M sequence into parallel register 5. These states are codes according to which it is necessary to sum the M-sequence shifts from the outputs of the shift register 6 to obtain the desired shift. The impulse from the output of the counter 3 also records, using its information inputs, the codes supplied to them via the bus 8 by setting constant coefficients and obtaining the corresponding shift of the M-sequence. The code generator operates dynamically and generates cyclic shifts of the M-sequence at the outputs of shift register 6, and factors at the outputs of the parallel register 5 determine the topology of the shifts of the shift register with modulo two to obtain the required copy shift of the M-sequence. Generator 2 M-sequence contains a circuit for detecting and eliminating the forbidden state. Claim code generator comprising a clock pulse generator, M-sequence generator, counter, decoder, BAN element, constant coefficient setting bus, outputs of the M-generator sequence bits connected to the corresponding decoder inputs, the output of which is connected to the first input of the CLOCK element The output of which is connected to the input of the counter, the output of which is connected to the second input of the BANE element, the third input of which is connected to the output of the clock generator, which differs so that, in order to improve noise immunity and enhance functionality by ensuring the formation of codes to obtain all the shifts of the M-sequence, a parallel register and a shift register, the first input of which is connected to the output of the clock generator and the input of the generator M-sequence The outputs of the bits of which are connected to the corresponding information inputs of the parallel register, the synchronization input of which is connected to the output of the counter, the information inputs of which go connected to the bus for 3112643164 Given the constant coefficients, the output of the M-sequence is connected to the corresponding bit by the generator input of the shift register.