SU1249512A1 - Random sequence generator - Google Patents

Abstract

The invention relates to computing and can be used in stochastic computers, simulators, and also as simulators of rooms. The purpose of the invention is to expand the field of application of the generator by increasing the randomization of the generated sequences. The generator contains a generator of 1 clock pulses, a shift register 2, a block of 3 modulo-two adders, a register of 4 codes, a switch 5. The random mode is carried out by moving the switch to position 52. This forms an additional closed loop from the block of modulo-adders a high-frequency asynchronous random process, the individual samples from which are written by the generator clock into the register. Due to this, the pseudo-random mode of the register with linear feedback through a block of modulo-two adders is broken. For normal operation of the generator in a pseudo-random mode, it is necessary to pre-register with the signal "Write the initial state to the register recorded in the code register. 3 il. (L ND; about SP to

Description

The invention relates to the field of computer technology and can be used in stochastic computing machines, modeling devices, as well as interference simulators.

The aim of the invention is to expand the field of application of the generator by increasing the randomization of the generated sequence.

FIG. 1 shows the generator circuit diagram; in fig. 2 - block diagram of modulo adders; in fig. 3 is a special case of the generator circuit and timing diagrams, as discussed below, its operation.

The generator contains a generator of 1 clock pulses, a shift register 2, a unit 3 modulo-two adders, a register 4 codes, a switch 5, an input 6 "Record, an input 7 settings, a second group of inputs 8 of block 3.

In the mode of generating pseudorandom signals, the switch 5 closes the contact 5i. A constant logic level is applied to the input 7 of the setting. The additional inputs of block 3 form an additional term to the feedback signal of register 2.

The appearance of a pseudo-random sequence is determined by a given characteristic polynomial. This polynomial is irreducible and primitive, therefore, the device will generate an M-sequence.

In order for the generator to work in a pseudo-random mode, it is necessary to preliminarily add the signal “Record on input 6” to the initial state in register 2 recorded in register 4. For a direct pseudo-random sequence, the initial installation code must not be zero single

The remaining conditions of operation do not differ from the known device.

Random mode is oswingless by moving switch 5 to position 62. In this way, an additional closed loop is formed from modulo-2 adders block 3 (FIG. 2), capable of generating a high-frequency asynchronous random process, individual samples of which will be recorded under the action of the clock pulses from generator 1 register 2. Due to this, the pseudo-random mode of operation of register 2 with linear feedback through block 3 is violated.

The operation of the asynchronous circuit is based on small natural fluctuations of the time delays of the block of 3 modulo-two adders.

Continuous fluctuations., 1and in the contour will correspond to the continuous migration of the inputs of the adder over the outputs of a hypothetical shift register synchronized with a random frequency. The output process will be a temporary collection of random lengths of various

0

five

0

five

0

five

pseudorandom sequences with a random time scale and a random initial phase.

The generator works in the following way.

Not starting the generator in register 4, the code forms the initial state code of register 2. Then a write pulse is applied to input 6, as a result of which the initial state code is rewritten from register 4 to register 2. From this moment the generator is ready to form a pseudo-random word. Modulo 2 adders block 3 from the signals taken from the outputs of shift register 2 generates a feedback signal and feeds it to the information input of register 2. A clock pulse from generator 1 records this signal for the first bit, and for the remaining bits of register 2 shifts information, which leads to the formation of a new feedback signal from block 3, etc. The operation of the device in this mode is completely similar to the operation of the known device.

In the random sequence mode, switch 5 is in position 52. Let also t be an even number, and 1. In this case, the generator is able to start working from any initial state, therefore, presetting register 2 is optional. Suppose that register 2 is in the zero initial state, then a and, which corresponds to the excitation of a high-frequency asynchronous random sequence in block 3 of adders. The clock pulse from generator 1, the shift information in register 2, fixes a random character from this sequence in its first digit. The second clock pulse also shifts the prediction information and writes the new signal to the first bit of register 2. This signal will be a random sample of the asynchronous sequence generated by the loop from block 3 of adders to those

l

until 2 biCi takes a single value. Then aa, which corresponds to any steady state of the asynchronous circuit a (; {0,1) (the trigger mode of this circuit is organized). The specific value of a is determined by a random signal from the asynchronous sequence at the last time point of case 0. This signal will be permanently recorded in the first register of 2 times per clock cycle, while

yy

The i bid will not change its value again to 0. Then the high-frequency asynchronous process will start again, write it to register 2 synchronously, and so on.

As a result of this organization of work, the phases of random and pseudo-random modes of operation of the device will be intermixed in time, and at the outputs of register 2 a random synchronous sequence is formed.

FIG. The diagram shows the simplest GSP with p 3. Register 4 of the code is set to code 100 (the free input of logic elements corresponds to the logic “1” and the connection to the common bus - to the logic “O, which is typical, for example, for positive TTL logic). Block 3 adders consists of one three-input modulo-two adder with a real delay, marked by -. Setup input 7 with signal a 1 is replaced by an equivalent connection of one of the inverse outputs of register 2 to the block of adders 3. Position 5: the switch corresponds to feeding the auxiliary input of the block of adders 3 to a signal “1, compensating, inverted from the output of register 2.

The operation of the device in the pseudo-random sequence shaping mode is represented by timing diagrams in FIG. 36

The signal of input 6 (second diagram from above) records the 100 code of register 4 into register 2, which is reflected in the output states of bits 2, 1h and 2h (third, fourth and fifth diagrams from the top, respectively). The result of the summation of block 3 (lower diagram) is recorded in the first bit 2i of register 2. The synchronization of the drying device is a sequence of clock pulses from generator 1 (upper diagram). The generator forms a pseudo-random M-sequence, the period of which is highlighted in the timing diagrams of FIG. 36

Setting switch 5 to position 52 generates a random sequence. Illustrations of this mode are presented in the time diagrams of FIG. Sound

Let the initial state of register 2 correspond to code 100 and start the generation of an asynchronous sequence (in this case, this is the simplest asynchronous weakly fluctuation, and a sequence of the type "Meander"). At the time of the clock pulse, a random symbol is selected from this sequence (in this case, “O”) and recorded in the first bit of register 2. The information is shifted by one bit. The high-frequency generation stops and, because asynchronous sequence was recorded level of logical "O. The same feedback signal will also be present during the third period. Only during the period of the fourth clock cycle does the condition of initiating an asynchronous sequence arise again, leading to the fixation of the random "1," symbol, etc.

On the time diagrams for the outputs of blocks 3 and 2, the time intervals corresponding to the formation of symbols in the absence of asynchronous generation are marked with the letters a, b, c, d, e. The moments of fixation of random characters in the first bit

Register 2 of the asynchronous process from the output of the block of adders 3 are marked with arrows and dots.

For real SHGs, the E number should, if possible, be chosen as large as possible; accordingly, the number of series-connected adders in block 3 should also be large. For example, in relation to elements of TTL logic, it is advisable to choose 6-12. In this case, the asynchronous process, which is excited in the circuit from the adders of block 3, will lose its periodic nature and become random, which will help to fix statistically independent symbols in the first digit of the register 2.

By combining the functions of a linear feedback unit and an asynchronous random sequence generator using small natural time-varying fluctuations of adders, the device is simple, performed entirely on digital elements and allows operation in two modes: random and pseudo-random, without turning on the stand-alone sensor of the original sequence random characters.

Claims (1)

Invention Formula A random sequence generator containing a code register, the bit outputs of which are connected to the inputs of the corresponding bits of the shift register, the setup input of which is the input of the generator record, clock generator of 1.1 X pulses, the output of which is connected to the clock register of the shift register, bit you. the strokes of which are connected to the first group of inputs of the block of modulo E two respectively, the output of which is connected to the input of the "Shift register shift, characterized in that, in order to expand the area Neither the generator increases the randomization of the generated sequence, it contains a switch, the output of which is connected to the second group of inputs of the summator module modulo two, the output of which is connected to the first input of the switch, the second input of which is combined with the input of the unit of modulators two and is the input of the generator setting.