SU1198516A1 - Squaring device - Google Patents

Abstract

A device for squaring into a square that contains the first cytmator, the first memory block whose address inputs are connected to the high-order operand bits of the device, the first memory block inputs are connected to the first input group of the first adder, the outputs of which are device outputs different By the fact that, in order to maintain speed and simplify the device, it contains a decoder, / in groups of elements I (t 1 + foi-ed, where d is the number of participants in the approximation), the second memory block and the second adder, the outputs of which are connected to. at The second group of inputs of the first adder, the inputs of the second adder are connected to the ilochod elements of the groups and the outputs of the second memory block, whose address inputs are connected to the inputs of the low-order bits of the operand of the device, which are connected to the first inputs of the elements of the AND groups whose second inputs are connected to the corresponding a trunk of the output of the decoder, the inputs (of which are connected to the inputs from the higher bits of the device operand.

Description

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1 invention relates to digital computing technology and can be used in the construction of digital devices for signal processing, information measuring systems, specialized calculators and hybrid functional converters.

The purpose of the invention is to increase the speed and simplify the device.

Figure 1 shows the block diagram of the device; Fig. 2 shows diagrams explaining the transformation principle.

The device for squaring contains the decoder 1, the first memory block 2, the first and second adders 3 and 4, the second memory block 5, m -groups of elements And 6-1, 6-2, .... 6-m.

The device is based on the principle of piecewise linear approximation (KPA) of the original function, Xe, 1) (a normalized parallel binary code arrives at the device input) with subsequent correction of the difference between the original function Y and its linear approximation H, called the linux correction function.

Figure 2 shows the initial function, approximating the function f with the number of sections of the spacecraft of about 8 and the correction function D Y Y – Y.

The CPS is built in such a way that the approximation nodes are located evenly and the slope coefficients are equal to the degree or sum of the degrees of the number two, which is achieved by constructing approximating lines in the form of tangents to the initial curve in the approximation nodes with odd numbers. It is known that, with a uniform QPA of the quadratic dependence, the correction function is periodic, and the period is -j, the function is symmetric about the middle of the period, which simplifies the definition of uV for an arbitrary X. The maximum value of the PM is determined in accordance with the formula

 -f

(I

YU „

TCG 4o6 Write the result of the conversion dp i-ro plot;

,.), U)

H

85162

where l X e (O,);

i 1,2o (;

B - values corresponding to

top of the i-ro site; K.- coefficient of slope on the i-th

plot.

The values of B-are recorded in the first memory block 2, and the values of the function JQ of the correction dU (lx) are recorded in the second memory block 5 and are used to adjust the result of the conversion. When converting N-bit numbers with an accuracy of -1-volumes, the first Q and second fl, memory blocks are determined in accordance with the formulas:

Qi -N; .,., (3) Q; {N - g) 2 (4)

20 where g 2 (1 - 1 from 2 oi),

The values of the coefficients of slope K | According to the condition of construction, the CPA is determined from the row 2,2,2 -..., 2 g For oi-8 this row will be as follows:

25 2, 2 °, 2, 2, and the coefficients themselves:, К2 Кз 1 + 4 + -j, + 1+, К, 2 (figure 2). This means that the multiplication operation by K. in the formula (2) may be

3Q is not a summation of spatially shifted bits x. The number of members of the row, and consequently, the number of groups of elements AND 6, with the help of which the shift is carried out, in the structure of the device is defined as m 1 + log 0. (5)

The operation of the device is as follows.

The higher bits of the N-bit code X from the first memory block 2 select the value B of the approximation node. The same bits control the decoder 1, which defines the portion of the approximating function and includes the groups of elements I.6-1, 6-2, ..., 6-t, which determine the slope coefficient of K. The lx bits arrive at address

the inputs of the second memory block 5, of

which reads the value of the correction function (FF (dX), as well as the inputs of the groups of elements AND 6-1, 6-2, ..., 6-t, with which

the LH bits are shifted. The cyt codes obtained at the outputs of the And 6-1, 6-2, ..., 6th element groups are correlated with the corrective values

Claims (1)

DEVICE FOR SQUARE, containing the first sugger, the first memory block, the address inputs of which are connected to the inputs of the upper bits of the operand of the device, the outputs of the first memory block are connected to the first group of inputs of the first adder, the outputs of which are the outputs of the device, characterized in that that, in order to improve the performance and simplify the device, it contains a decoder, _ζ 6ί groups of elements And (t = 1+ where o (is the number of participants in the approximation), a second memory unit and a second adder, the outputs of which are connected to the second group of inputs of the first adder, the inputs of the second adder are connected to the outputs of the elements AND groups and the outputs of the second memory block, the address inputs of which are connected to the inputs of the least significant bits of the device operand, which are connected to the first inputs of the elements AND groups, the second inputs of which are connected to the corresponding outputs of the decoder, whose inputs are connected to the inputs of the upper bits of the device operand. „„ SU. 1198516> eleven